Cyclone® V 5CEA4 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Cyclone® V 5CEA4 FPGA 5CEBA4F17C8N

  • MM# 965674
  • Spec Code SR4RA
  • Ordering Code 5CEBA4F17C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4F23C8N

  • MM# 965675
  • Spec Code SR4RB
  • Ordering Code 5CEBA4F23C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4M13C6N

  • MM# 965679
  • Spec Code SR4RF
  • Ordering Code 5CEFA4M13C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4U19I7

  • MM# 965680
  • Spec Code SR4RG
  • Ordering Code 5CEFA4U19I7
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4F17A7N

  • MM# 965939
  • Spec Code SR4Z1
  • Ordering Code 5CEBA4F17A7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4F17C6N

  • MM# 965940
  • Spec Code SR4Z2
  • Ordering Code 5CEBA4F17C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4U15C8N

  • MM# 965941
  • Spec Code SR4Z3
  • Ordering Code 5CEBA4U15C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEFA4U19A7N

  • MM# 965946
  • Spec Code SR4Z8
  • Ordering Code 5CEFA4U19A7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4U19C6N

  • MM# 965947
  • Spec Code SR4Z9
  • Ordering Code 5CEFA4U19C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4U19C7N

  • MM# 965948
  • Spec Code SR4ZA
  • Ordering Code 5CEFA4U19C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4F17C7N

  • MM# 967845
  • Spec Code SR6KS
  • Ordering Code 5CEBA4F17C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEFA4F23C6N

  • MM# 967850
  • Spec Code SR6KX
  • Ordering Code 5CEFA4F23C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4M13C7N

  • MM# 967851
  • Spec Code SR6KY
  • Ordering Code 5CEFA4M13C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4U19C8N

  • MM# 967862
  • Spec Code SR6KZ
  • Ordering Code 5CEFA4U19C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4U19I7N

  • MM# 967863
  • Spec Code SR6L0
  • Ordering Code 5CEFA4U19I7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4F23C7N

  • MM# 968184
  • Spec Code SR6V7
  • Ordering Code 5CEBA4F23C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4F23C8N

  • MM# 968344
  • Spec Code SR6ZV
  • Ordering Code 5CEFA4F23C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4F17I7N

  • MM# 968884
  • Spec Code SR7FF
  • Ordering Code 5CEBA4F17I7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4U15I7N

  • MM# 968886
  • Spec Code SR7FH
  • Ordering Code 5CEBA4U15I7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4U15I7

  • MM# 968887
  • Spec Code SR7FG
  • Ordering Code 5CEBA4U15I7
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEFA4F23C7N

  • MM# 968891
  • Spec Code SR7FN
  • Ordering Code 5CEFA4F23C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4M13I7N

  • MM# 968892
  • Spec Code SR7FP
  • Ordering Code 5CEFA4M13I7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4F17I7

  • MM# 970591
  • Spec Code SR8U6
  • Ordering Code 5CEBA4F17I7
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEFA4M13C8N

  • MM# 970595
  • Spec Code SR8UA
  • Ordering Code 5CEFA4M13C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4U15C6N

  • MM# 973733
  • Spec Code SRBM0
  • Ordering Code 5CEBA4U15C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4U15C7N

  • MM# 973734
  • Spec Code SRBM1
  • Ordering Code 5CEBA4U15C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA4 FPGA 5CEBA4U19C7N

  • MM# 973735
  • Spec Code SRBM2
  • Ordering Code 5CEBA4U19C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEBA4U19C8N

  • MM# 973736
  • Spec Code SRBM3
  • Ordering Code 5CEBA4U19C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA4 FPGA 5CEFA4F23I7N

  • MM# 973741
  • Spec Code SRBM8
  • Ordering Code 5CEFA4F23I7N
  • Stepping A1
  • ECCN 3A991

Trade compliance information

  • ECCN Varies By Product
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SR6ZV

SR7FH

SR8U6

SR7FG

SR7FF

SR6KZ

SR4RB

SR6KY

SR4RA

SR6KX

SR4RG

SR4RF

SR4Z9

SR4Z8

SR6KS

SR4ZA

SR6L0

SR6V7

SRBM1

SRBM0

SR8UA

SR7FP

SR7FN

SR4Z3

SRBM8

SR4Z2

SR4Z1

SRBM3

SRBM2

Drivers and Software

Latest Drivers & Software

Downloads Available:
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Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.