Cyclone® V 5CEA2 FPGA

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Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Cyclone® V 5CEA2 FPGA 5CEBA2F17C8N

  • MM# 967841
  • Spec Code SR6KN
  • Ordering Code 5CEBA2F17C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEFA2F23C6N

  • MM# 965943
  • Spec Code SR4Z5
  • Ordering Code 5CEFA2F23C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2U19C7N

  • MM# 968343
  • Spec Code SR6ZU
  • Ordering Code 5CEFA2U19C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2U15C6N

  • MM# 968882
  • Spec Code SR7FD
  • Ordering Code 5CEBA2U15C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEFA2U19C8N

  • MM# 965945
  • Spec Code SR4Z7
  • Ordering Code 5CEFA2U19C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2F17I7N

  • MM# 967842
  • Spec Code SR6KP
  • Ordering Code 5CEBA2F17I7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEFA2U19I7N

  • MM# 968193
  • Spec Code SR6VG
  • Ordering Code 5CEFA2U19I7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2U19A7N

  • MM# 968342
  • Spec Code SR6ZT
  • Ordering Code 5CEFA2U19A7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2U15I7

  • MM# 965673
  • Spec Code SR4R9
  • Ordering Code 5CEBA2U15I7
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEBA2U19C7N

  • MM# 968885
  • Spec Code SR7FE
  • Ordering Code 5CEBA2U19C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2F23C7N

  • MM# 965678
  • Spec Code SR4RE
  • Ordering Code 5CEFA2F23C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2F17C6N

  • MM# 965671
  • Spec Code SR4R7
  • Ordering Code 5CEBA2F17C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEFA2U19C6N

  • MM# 970594
  • Spec Code SR8U9
  • Ordering Code 5CEFA2U19C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2F23C7N

  • MM# 965672
  • Spec Code SR4R8
  • Ordering Code 5CEBA2F23C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2F23I7N

  • MM# 967849
  • Spec Code SR6KW
  • Ordering Code 5CEFA2F23I7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2U19C8N

  • MM# 968183
  • Spec Code SR6V6
  • Ordering Code 5CEBA2U19C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2M13C7N

  • MM# 968890
  • Spec Code SR7FM
  • Ordering Code 5CEFA2M13C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2M13C8N

  • MM# 970593
  • Spec Code SR8U8
  • Ordering Code 5CEFA2M13C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2F23C8N

  • MM# 968888
  • Spec Code SR7FK
  • Ordering Code 5CEFA2F23C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2M13C6N

  • MM# 965944
  • Spec Code SR4Z6
  • Ordering Code 5CEFA2M13C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2F17C7N

  • MM# 968182
  • Spec Code SR6V5
  • Ordering Code 5CEBA2F17C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEBA2F17A7N

  • MM# 968181
  • Spec Code SR6V4
  • Ordering Code 5CEBA2F17A7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEFA2M13I7N

  • MM# 968341
  • Spec Code SR6ZS
  • Ordering Code 5CEFA2M13I7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEFA2F23I7

  • MM# 968340
  • Spec Code SR6ZR
  • Ordering Code 5CEFA2F23I7
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2F23C8N

  • MM# 968335
  • Spec Code SR6ZL
  • Ordering Code 5CEBA2F23C8N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CEA2 FPGA 5CEBA2U15C8N

  • MM# 967844
  • Spec Code SR6KR
  • Ordering Code 5CEBA2U15C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEBA2U15C7N

  • MM# 967843
  • Spec Code SR6KQ
  • Ordering Code 5CEBA2U15C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CEA2 FPGA 5CEBA2U15I7N

  • MM# 968336
  • Spec Code SR6ZM
  • Ordering Code 5CEBA2U15I7N
  • Stepping A1
  • ECCN EAR99

Trade compliance information

  • ECCN Varies By Product
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SR7FE

SR7FD

SR6ZU

SR6ZT

SR6ZS

SR7FM

SR8U9

SR7FK

SR8U8

SR6KW

SR6ZR

SR6ZM

SR6ZL

SR6VG

SR4RE

SR6V6

SR6V5

SR6V4

SR4Z7

SR4Z6

SR4Z5

SR6KR

SR6KQ

SR6KP

SR4R9

SR4R8

SR6KN

SR4R7

Drivers and Software

Latest Drivers & Software

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Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.