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  • Brand Name: Core i7

  • Product Number: i7-12700KF

  • Ordering Code: CM8071504553829

  • SPEC Code: SRL4P

  • Code Name: Alder Lake

Intel® Xeon® Processor E7 v3 Family

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12 Products COMPARE ALL COMPARE NONE
Product Name
Launch Date
Total Cores
Max Turbo Frequency
Processor Base Frequency
Cache
TDP
Intel® Xeon® Processor E7-4809 v3
Q2'15 8 2.00 GHz 20 MB Last Level Cache 115 W
Intel® Xeon® Processor E7-4820 v3
Q2'15 10 1.90 GHz 25 MB Last Level Cache 115 W
Intel® Xeon® Processor E7-4830 v3
Q2'15 12 2.70 GHz 2.10 GHz 30 MB Last Level Cache 115 W
Intel® Xeon® Processor E7-4850 v3
Q2'15 14 2.80 GHz 2.20 GHz 35 MB Last Level Cache 115 W
Intel® Xeon® Processor E7-8860 v3
Q2'15 16 3.20 GHz 2.20 GHz 40 MB Last Level Cache 140 W
Intel® Xeon® Processor E7-8867 v3
Q2'15 16 3.30 GHz 2.50 GHz 45 MB 165 W
Intel® Xeon® Processor E7-8870 v3
Q2'15 18 2.90 GHz 2.10 GHz 45 MB Last Level Cache 140 W
Intel® Xeon® Processor E7-8880 v3
Q2'15 18 3.10 GHz 2.30 GHz 45 MB Last Level Cache 150 W
Intel® Xeon® Processor E7-8880L v3
Q2'15 18 2.80 GHz 2.00 GHz 45 MB Last Level Cache 115 W
Intel® Xeon® Processor E7-8890 v3
Q2'15 18 3.30 GHz 2.50 GHz 45 MB Last Level Cache 165 W
Intel® Xeon® Processor E7-8891 v3
Q2'15 10 3.50 GHz 2.80 GHz 45 MB Last Level Cache 165 W
Intel® Xeon® Processor E7-8893 v3
Q2'15 4 3.50 GHz 3.20 GHz 45 MB Last Level Cache 140 W

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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.

System and Maximum TDP is based on worst case scenarios. Actual TDP may be lower if not all I/Os for chipsets are used.