Intel® Pentium® Processor with MMX™ Technology 166 MHz, 66 MHz FSB
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Cores is a hardware term that describes the number of independent central processing units in a single computing component (die or chip).
Processor Base Frequency
Processor Base Frequency describes the rate at which the processor's transistors open and close. The processor base frequency is the operating point where TDP is defined. Frequency is typically measured in gigahertz (GHz), or billion cycles per second.
CPU Cache is an area of fast memory located on the processor. Intel® Smart Cache refers to the architecture that allows all cores to dynamically share access to the last level cache.
A bus is a subsystem that transfers data between computer components or between computers. Types include front-side bus (FSB), which carries data between the CPU and memory controller hub; direct media interface (DMI), which is a point-to-point interconnection between an Intel integrated memory controller and an Intel I/O controller hub on the computer’s motherboard; and Quick Path Interconnect (QPI), which is a point-to-point interconnect between the CPU and the integrated memory controller.
Thermal Design Power (TDP) represents the average power, in watts, the processor dissipates when operating at Base Frequency with all cores active under an Intel-defined, high-complexity workload. Refer to Datasheet for thermal solution requirements.
VID Voltage Range
VID Voltage Range is an indicator of the minimum and maximum voltage values at which the processor is designed to operate. The processor communicates VID to the VRM (Voltage Regulator Module), which in turn delivers that correct voltage to the processor.
Embedded Options Available
“Embedded Options Available” indicates the SKU is typically available for purchase for 7 years from the launch of the first SKU in the Product family and may be available for purchase for a longer period of time under certain circumstances. Intel does not commit or guarantee product Availability or Technical Support by way of roadmap guidance. Intel reserves the right to change roadmaps or discontinue products, software and software support services through standard EOL/PDN processes. Product certification and use condition information can be found in the Production Release Qualification (PRQ) report for this SKU. Contact your Intel representative for details.
Case Temperature is the maximum temperature allowed at the processor Integrated Heat Spreader (IHS).
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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
System and Maximum TDP is based on worst case scenarios. Actual TDP may be lower if not all I/Os for chipsets are used.