Intel Agilex® 7 FPGA I-Series 022

R31A

Specifications

Resources

I/O Specifications

Advanced Technologies

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2E3V

  • MM# 99C6C2
  • Spec Code SRMF0
  • Ordering Code AGIB022R31A2E3V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2I3V

  • MM# 99C6C5
  • Spec Code SRMF3
  • Ordering Code AGIB022R31A2I3V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A3E3V

  • MM# 99C6CR
  • Spec Code SRMFF
  • Ordering Code AGIB022R31A3E3V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A3I3V

  • MM# 99C6CT
  • Spec Code SRMFG
  • Ordering Code AGIB022R31A3I3V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1E1VB

  • MM# 99C7WD
  • Spec Code SRMKY
  • Ordering Code AGIB022R31A1E1VB
  • Stepping A2
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2E1VB

  • MM# 99C7WT
  • Spec Code SRMKZ
  • Ordering Code AGIB022R31A2E1VB
  • Stepping A2
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1E2VB

  • MM# 99C7WV
  • Spec Code SRML0
  • Ordering Code AGIB022R31A1E2VB
  • Stepping A2
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2E2VB

  • MM# 99C7WW
  • Spec Code SRML1
  • Ordering Code AGIB022R31A2E2VB
  • Stepping A2
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1I1VB

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2I1VB

  • MM# 99C7X5
  • Spec Code SRML3
  • Ordering Code AGIB022R31A2I1VB
  • Stepping A2
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1I2VB

  • MM# 99C7X7
  • Spec Code SRML4
  • Ordering Code AGIB022R31A1I2VB
  • Stepping A2
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2I2VB

  • MM# 99C7X8
  • Spec Code SRML5
  • Ordering Code AGIB022R31A2I2VB
  • Stepping A2
  • MDDS Content IDs 789182

Retired and discontinued

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1I2V

  • MM# 99C6AK
  • Spec Code SRMEX
  • Ordering Code AGIB022R31A1I2V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2E1V

  • MM# 99C6AL
  • Spec Code SRMEY
  • Ordering Code AGIB022R31A2E1V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2E2V

  • MM# 99C6C1
  • Spec Code SRMEZ
  • Ordering Code AGIB022R31A2E2V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2I1V

  • MM# 99C6C3
  • Spec Code SRMF1
  • Ordering Code AGIB022R31A2I1V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A2I2V

  • MM# 99C6C4
  • Spec Code SRMF2
  • Ordering Code AGIB022R31A2I2V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1E1V

  • MM# 99C6C6
  • Spec Code SRMF4
  • Ordering Code AGIB022R31A1E1V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1E2V

  • MM# 99CDWR
  • Spec Code SRN0M
  • Ordering Code AGIB022R31A1E2V
  • Stepping A5
  • MDDS Content IDs 789182

Intel Agilex® 7 FPGA I-Series 022 (R31A) AGIB022R31A1I1V

  • MM# 99CDWT
  • Spec Code SRN0N
  • Ordering Code AGIB022R31A1I1V
  • Stepping A5
  • MDDS Content IDs 789182

Trade compliance information

  • ECCN 5A002U
  • CCATS G178951
  • US HTS 8542390001

PCN Information

SRMF0

SRMF1

SRMF2

SRMF3

SRMF4

SRMKY

SRMKZ

SRML0

SRML1

SRML2

SRML3

SRML4

SRML5

SRMFF

SRMFG

SRMEX

SRMEY

SRMEZ

Drivers and Software

Latest Drivers & Software

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Name

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Processor System (HPS)

The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Maximum Pulse-Amplitude Modulation (PAM4) Transceivers

The maximum number of PAM4 transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Pulse-Amplitude Modulation (PAM4) Data Rate

The maximum PAM4 data rate that is supported by the PAM4 transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Hyper-Registers

Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.