Intel Agilex® 7 FPGA F-Series 014
Specifications
Compare Intel® Products
Essentials
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Product Collection
Intel Agilex® 7 FPGAs and SoC FPGAs F-Series
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Marketing Status
Launched
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Launch Date
Q2'19
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Lithography
10 nm
Resources
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Logic Elements (LE)
1437240
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Adaptive Logic Modules (ALM)
487200
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Adaptive Logic Module (ALM) Registers
1948800
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Fabric and I/O Phase-Locked Loops (PLLs)
24
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Maximum Embedded Memory
190 Mb
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Digital Signal Processing (DSP) Blocks
4510
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Digital Signal Processing (DSP) Format
Fixed Point (hard IP), Floating Point (hard IP), Multiply, Multiply and Accumulate, Variable Precision
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Hard Processor System (HPS)
Quad-core 64 bit Arm* Cortex*-A53
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Hard Crypto Blocks
0
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR4, QDR IV
I/O Specifications
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Maximum User I/O Count†
744
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I/O Standards Support
1.2 V LVCMOS, 1.8 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, True Differential Signaling
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Maximum LVDS Pairs
372
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Maximum Non-Return to Zero (NRZ) Transceivers†
32
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Maximum Non-Return to Zero (NRZ) Data Rate†
32 Gbps
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Maximum Pulse-Amplitude Modulation (PAM4) Transceivers†
24
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Maximum Pulse-Amplitude Modulation (PAM4) Data Rate†
58 Gbps
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Transceiver Protocol Hard IP
PCIe Gen4, 10/25/50/100/200/400G Ethernet
Advanced Technologies
Package Specifications
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Package Options
R2340A
Ordering and Compliance
Ordering and spec information
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFA014R24C2E3V
- MM# 99AZ3K
- Spec Code SRLXH
- Ordering Code AGFA014R24C2E3V
- Stepping B2
- ECCN 3A001.A.7.A
- CCATS G171972
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFA014R24C2E2V
- MM# 99AZ5P
- Spec Code SRLXZ
- Ordering Code AGFA014R24C2E2V
- Stepping B2
- ECCN 3A001.A.7.A
- CCATS G171972
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFB014R24C2E2V
- MM# 99AZ65
- Spec Code SRLY6
- Ordering Code AGFB014R24C2E2V
- Stepping B2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFB014R24C2E3V
- MM# 99AZ66
- Spec Code SRLY7
- Ordering Code AGFB014R24C2E3V
- Stepping B2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFA014R24C2E1VB
- MM# 99CAJV
- Spec Code SRMSJ
- Ordering Code AGFA014R24C2E1VB
- Stepping B2
- ECCN 3A001.A.7.A
- CCATS G171972
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFA014R24C2E2VB
- MM# 99CAJX
- Spec Code SRMSK
- Ordering Code AGFA014R24C2E2VB
- Stepping B2
- ECCN 3A001.A.7.A
- CCATS G171972
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFA014R24C2I1VB
- MM# 99CAJZ
- Spec Code SRMSL
- Ordering Code AGFA014R24C2I1VB
- Stepping B2
- ECCN 3A001.A.7.A
- CCATS G171972
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFA014R24C2I2VB
- MM# 99CAK0
- Spec Code SRMSM
- Ordering Code AGFA014R24C2I2VB
- Stepping B2
- ECCN 3A001.A.7.A
- CCATS G171972
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFB014R24C2E1VB
- MM# 99CAMK
- Spec Code SRMU6
- Ordering Code AGFB014R24C2E1VB
- Stepping B2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFB014R24C2E2VB
- MM# 99CAML
- Spec Code SRMU7
- Ordering Code AGFB014R24C2E2VB
- Stepping B2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFB014R24C2I1VB
- MM# 99CAMM
- Spec Code SRMU8
- Ordering Code AGFB014R24C2I1VB
- Stepping B2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA F-Series 014 (R24C) AGFB014R24C2I2VB
- MM# 99CAMN
- Spec Code SRMU9
- Ordering Code AGFB014R24C2I2VB
- Stepping B2
- ECCN 5A002U
- CCATS G178951
Trade compliance information
- ECCN Varies By Product
- CCATS Varies By Product
- US HTS 8542390001
PCN Information
SRLXG
- 99AZ3J PCN
SRLXH
- 99AZ3K PCN
SRLXJ
- 99AZ3L PCN
SRLYT
- 99AZ7P PCN
SRLYU
- 99AZ7R PCN
SRLYV
- 99AZ7T PCN
SRM6U
- 99C23X PCN
SRM6W
- 99C243 PCN
SRLYL
- 99AZ74 PCN
SRLYM
- 99AZ75 PCN
SRLYS
- 99AZ7N PCN
SRLYJ
- 99AZ72 PCN
SRLYK
- 99AZ73 PCN
SRLYA
- 99AZ69 PCN
SRLYB
- 99AZ6A PCN
SRLYC
- 99AZ6M PCN
SRLXT
- 99AZ57 PCN
SRLXU
- 99AZ5H PCN
SRLY6
- 99AZ65 PCN
SRLXV
- 99AZ5K PCN
SRLY7
- 99AZ66 PCN
SRLY9
- 99AZ68 PCN
SRLXZ
- 99AZ5P PCN
SRLXK
- 99AZ3M PCN
SRLXM
- 99AZ4N PCN
SRLXN
- 99AZ50 PCN
SRLXP
- 99AZ51 PCN
SRLXQ
- 99AZ52 PCN
SRLY2
- 99AZ5Z PCN
SRLY3
- 99AZ60 PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Processor System (HPS)
The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Maximum Pulse-Amplitude Modulation (PAM4) Transceivers†
The maximum number of PAM4 transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Pulse-Amplitude Modulation (PAM4) Data Rate†
The maximum PAM4 data rate that is supported by the PAM4 transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
Hyper-Registers
Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
Give Feedback
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.