Intel Agilex® 7 FPGA I-Series 027
Specifications
Compare Intel® Products
Essentials
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Product Collection
Intel Agilex® 7 FPGAs and SoC FPGAs I-Series
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Marketing Status
Launched
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Launch Date
Q2'19
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Lithography
10 nm
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Resources
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Logic Elements (LE)
2692760
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Adaptive Logic Modules (ALM)
912800
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Adaptive Logic Module (ALM) Registers
3651200
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Fabric and I/O Phase-Locked Loops (PLLs)
28
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Maximum Embedded Memory
287 Mb
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Digital Signal Processing (DSP) Blocks
8528
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Digital Signal Processing (DSP) Format
Multiply, Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
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Hard Processor System (HPS)
Quad-core 64 bit Arm* Cortex*-A53
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Hard Crypto Blocks
0
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR4, QDR IV
I/O Specifications
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Maximum User I/O Count†
720
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I/O Standards Support
1.2 V LVCMOS, 1.8 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, True Differential Signaling
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Maximum LVDS Pairs
360
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Maximum Non-Return to Zero (NRZ) Transceivers†
20
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Maximum Non-Return to Zero (NRZ) Data Rate†
58 Gbps
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Maximum Pulse-Amplitude Modulation (PAM4) Transceivers†
16
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Maximum Pulse-Amplitude Modulation (PAM4) Data Rate†
116 Gbps
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Transceiver Protocol Hard IP
CXL, PCIe Gen4, PCIe Gen5, 10/25/50/100/200/400G Ethernet
Advanced Technologies
Package Specifications
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Package Options
R2957A
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
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Ordering and spec information
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A1I2VC
- MM# 99CHF9
- Spec Code SRNL2
- Ordering Code AGIB027R29A1I2VC
- Stepping A2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A2I1VC
- MM# 99CHH3
- Spec Code SRNMQ
- Ordering Code AGIB027R29A2I1VC
- Stepping A2
- ECCN HOLD
- CCATS NA
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A1E2VC
- MM# 99CHLP
- Spec Code SRNR4
- Ordering Code AGIB027R29A1E2VC
- Stepping A2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A1E1VC
- MM# 99CHWG
- Spec Code SRNXE
- Ordering Code AGIB027R29A1E1VC
- Stepping A2
- ECCN 5A002U
- CCATS G178951
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A2I2VC
- MM# 99CHZH
- Spec Code SRNZA
- Ordering Code AGIB027R29A2I2VC
- Stepping A2
- ECCN HOLD
- CCATS NA
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A2E1VC
- MM# 99CJ20
- Spec Code SRP3L
- Ordering Code AGIB027R29A2E1VC
- Stepping A2
- ECCN HOLD
- CCATS NA
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A2E2VC
- MM# 99CJ53
- Spec Code SRP6H
- Ordering Code AGIB027R29A2E2VC
- Stepping A2
- ECCN HOLD
- CCATS NA
Intel Agilex® 7 FPGA I-Series 027 (R29A) AGIB027R29A1I1VC
- MM# 99CJ5N
- Spec Code SRP72
- Ordering Code AGIB027R29A1I1VC
- Stepping A2
- ECCN 5A002U
- CCATS G178951
Retired and discontinued
Trade compliance information
- ECCN Varies By Product
- CCATS Varies By Product
- US HTS 8542390001
PCN Information
SRMKU
- 99C7W0 PCN
SRMKV
- 99C7W1 PCN
SRMKX
- 99C7W4 PCN
SRNXE
- 99CHWG PCN
SRNR4
- 99CHLP PCN
SRMKP
- 99C7VA PCN
SRNMQ
- 99CHH3 PCN
SRMKQ
- 99C7VC PCN
SRMKR
- 99C7VR PCN
SRNL2
- 99CHF9 PCN
SRMKS
- 99C7VT PCN
SRNZA
- 99CHZH PCN
SRMKT
- 99C7VV PCN
SRN0J
- 99CDWM PCN
SRN0K
- 99CDWN PCN
SRN0L
- 99CDWP PCN
SRP72
- 99CJ5N PCN
SRN0C
- 99CDWD PCN
SRP6H
- 99CJ53 PCN
SRN0E
- 99CDWH PCN
SRN0F
- 99CDWJ PCN
SRN0G
- 99CDWK PCN
SRN0H
- 99CDWL PCN
SRLWD
- 99AXV6 PCN
SRLWG
- 99AXV9 PCN
SRLWA
- 99AXV3 PCN
SRP3L
- 99CJ20 PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Processor System (HPS)
The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Maximum Pulse-Amplitude Modulation (PAM4) Transceivers†
The maximum number of PAM4 transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Pulse-Amplitude Modulation (PAM4) Data Rate†
The maximum PAM4 data rate that is supported by the PAM4 transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
Hyper-Registers
Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.