Cyclone® IV EP4CE6 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Cyclone® IV EP4CE6 FPGA EP4CE6F17C9LN

  • MM# 967044
  • Spec Code SR5WT
  • Ordering Code EP4CE6F17C9LN
  • Stepping A1
  • MDDS Content IDs 699788

Cyclone® IV EP4CE6 FPGA EP4CE6F17C8LN

  • MM# 967318
  • Spec Code SR64H
  • Ordering Code EP4CE6F17C8LN
  • Stepping A1
  • MDDS Content IDs 697025

Cyclone® IV EP4CE6 FPGA EP4CE6F17C9L

  • MM# 967319
  • Spec Code SR64J
  • Ordering Code EP4CE6F17C9L
  • Stepping A1
  • MDDS Content IDs 696298

Cyclone® IV EP4CE6 FPGA EP4CE6F17I7N

  • MM# 970231
  • Spec Code SR8J7
  • Ordering Code EP4CE6F17I7N
  • Stepping A1
  • MDDS Content IDs 700007

Cyclone® IV EP4CE6 FPGA EP4CE6F17I7

  • MM# 971173
  • Spec Code SR9DG
  • Ordering Code EP4CE6F17I7
  • Stepping A1
  • MDDS Content IDs 696054

Cyclone® IV EP4CE6 FPGA EP4CE6F17A7N

  • MM# 971911
  • Spec Code SRAH8
  • Ordering Code EP4CE6F17A7N
  • Stepping A1
  • MDDS Content IDs 699726

Cyclone® IV EP4CE6 FPGA EP4CE6F17C6

  • MM# 971912
  • Spec Code SRAH9
  • Ordering Code EP4CE6F17C6
  • Stepping A1
  • MDDS Content IDs 702924

Cyclone® IV EP4CE6 FPGA EP4CE6F17C7N

  • MM# 971913
  • Spec Code SRAHA
  • Ordering Code EP4CE6F17C7N
  • Stepping A1
  • MDDS Content IDs 693615

Cyclone® IV EP4CE6 FPGA EP4CE6F17C8L

  • MM# 971914
  • Spec Code SRAHB
  • Ordering Code EP4CE6F17C8L
  • Stepping A1
  • MDDS Content IDs 697987

Cyclone® IV EP4CE6 FPGA EP4CE6F17C8N

  • MM# 971915
  • Spec Code SRAHC
  • Ordering Code EP4CE6F17C8N
  • Stepping A1
  • MDDS Content IDs 694034

Cyclone® IV EP4CE6 FPGA EP4CE6F17C7

  • MM# 972530
  • Spec Code SRAMT
  • Ordering Code EP4CE6F17C7
  • Stepping A1
  • MDDS Content IDs 694737

Cyclone® IV EP4CE6 FPGA EP4CE6F17C8

  • MM# 972531
  • Spec Code SRAMU
  • Ordering Code EP4CE6F17C8
  • Stepping A1
  • MDDS Content IDs 692203

Cyclone® IV EP4CE6 FPGA EP4CE6U14I7N

  • MM# 972532
  • Spec Code SRAMV
  • Ordering Code EP4CE6U14I7N
  • Stepping A1
  • MDDS Content IDs 702338

Cyclone® IV EP4CE6 FPGA EP4CE6F17C6N

  • MM# 974428
  • Spec Code SRCGT
  • Ordering Code EP4CE6F17C6N
  • Stepping A1
  • MDDS Content IDs 696291

Cyclone® IV EP4CE6 FPGA EP4CE6F17I8L

  • MM# 974429
  • Spec Code SRCGU
  • Ordering Code EP4CE6F17I8L
  • Stepping A1
  • MDDS Content IDs 701776

Cyclone® IV EP4CE6 FPGA EP4CE6F17I8LN

  • MM# 974430
  • Spec Code SRCGV
  • Ordering Code EP4CE6F17I8LN
  • Stepping A1
  • MDDS Content IDs 701034

Trade compliance information

  • ECCN EAR99
  • CCATS NA
  • US HTS 8542390001

PCN Information

SR5WT

SRAH9

SRCGV

SRAH8

SRCGU

SRCGT

SR9DG

SRAHC

SRAHB

SRAHA

SR8J7

SR64J

SR64H

SRAMV

SRAMU

SRAMT

Drivers and Software

Latest Drivers & Software

Downloads Available:
All

Name

Support

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.