Cyclone® IV EP4CE75 FPGA


I/O Specifications

Package Specifications

Ordering and Compliance

Ordering and spec information

Cyclone® IV EP4CE75 FPGA EP4CE75F29I7

  • MM# 967056
  • Spec Code SR5X5
  • Ordering Code EP4CE75F29I7
  • Stepping A1
  • MDDS Content IDs 695644

Cyclone® IV EP4CE75 FPGA EP4CE75F23C7

  • MM# 967320
  • Spec Code SR64K
  • Ordering Code EP4CE75F23C7
  • Stepping A1
  • MDDS Content IDs 700930

Cyclone® IV EP4CE75 FPGA EP4CE75F23C8

  • MM# 967321
  • Spec Code SR64L
  • Ordering Code EP4CE75F23C8
  • Stepping A1
  • MDDS Content IDs 702853

Cyclone® IV EP4CE75 FPGA EP4CE75F29C6

  • MM# 967322
  • Spec Code SR64M
  • Ordering Code EP4CE75F29C6
  • Stepping A1
  • MDDS Content IDs 699845

Cyclone® IV EP4CE75 FPGA EP4CE75F29C8L

  • MM# 967323
  • Spec Code SR64N
  • Ordering Code EP4CE75F29C8L
  • Stepping A1
  • MDDS Content IDs 702758

Cyclone® IV EP4CE75 FPGA EP4CE75F29C8N

  • MM# 967324
  • Spec Code SR64P
  • Ordering Code EP4CE75F29C8N
  • Stepping A1
  • MDDS Content IDs 699712746493

Cyclone® IV EP4CE75 FPGA EP4CE75F29C9L

  • MM# 967325
  • Spec Code SR64Q
  • Ordering Code EP4CE75F29C9L
  • Stepping A1
  • MDDS Content IDs 692637

Cyclone® IV EP4CE75 FPGA EP4CE75F29I8LN

  • MM# 967326
  • Spec Code SR64R
  • Ordering Code EP4CE75F29I8LN
  • Stepping A1
  • MDDS Content IDs 693371

Cyclone® IV EP4CE75 FPGA EP4CE75F29C6N

  • MM# 970232
  • Spec Code SR8J8
  • Ordering Code EP4CE75F29C6N
  • Stepping A1
  • MDDS Content IDs 697167745110

Cyclone® IV EP4CE75 FPGA EP4CE75F23I7

  • MM# 971916
  • Spec Code SRAHD
  • Ordering Code EP4CE75F23I7
  • Stepping A1
  • MDDS Content IDs 696649

Cyclone® IV EP4CE75 FPGA EP4CE75F23I8L

  • MM# 971917
  • Spec Code SRAHE
  • Ordering Code EP4CE75F23I8L
  • Stepping A1
  • MDDS Content IDs 697409

Cyclone® IV EP4CE75 FPGA EP4CE75F29C7N

  • MM# 971918
  • Spec Code SRAHF
  • Ordering Code EP4CE75F29C7N
  • Stepping A1
  • MDDS Content IDs 695209744276

Cyclone® IV EP4CE75 FPGA EP4CE75F29C9LN

  • MM# 971919
  • Spec Code SRAHG
  • Ordering Code EP4CE75F29C9LN
  • Stepping A1
  • MDDS Content IDs 696893

Cyclone® IV EP4CE75 FPGA EP4CE75F23C6

  • MM# 972533
  • Spec Code SRAMW
  • Ordering Code EP4CE75F23C6
  • Stepping A1
  • MDDS Content IDs 692740

Cyclone® IV EP4CE75 FPGA EP4CE75F23C8L

  • MM# 972534
  • Spec Code SRAMX
  • Ordering Code EP4CE75F23C8L
  • Stepping A1
  • MDDS Content IDs 697017

Cyclone® IV EP4CE75 FPGA EP4CE75F29C7

  • MM# 972535
  • Spec Code SRAMY
  • Ordering Code EP4CE75F29C7
  • Stepping A1
  • MDDS Content IDs 696990

Cyclone® IV EP4CE75 FPGA EP4CE75F29C8LN

  • MM# 972536
  • Spec Code SRAMZ
  • Ordering Code EP4CE75F29C8LN
  • Stepping A1
  • MDDS Content IDs 699290

Cyclone® IV EP4CE75 FPGA EP4CE75F23C9L

  • MM# 973206
  • Spec Code SRB5G
  • Ordering Code EP4CE75F23C9L
  • Stepping A1
  • MDDS Content IDs 698278

Cyclone® IV EP4CE75 FPGA EP4CE75F29C8

  • MM# 973209
  • Spec Code SRB5K
  • Ordering Code EP4CE75F29C8
  • Stepping A1
  • MDDS Content IDs 694822

Cyclone® IV EP4CE75 FPGA EP4CE75F29I7N

  • MM# 973210
  • Spec Code SRB5L
  • Ordering Code EP4CE75F29I7N
  • Stepping A1
  • MDDS Content IDs 695395

Cyclone® IV EP4CE75 FPGA EP4CE75F29I8L

  • MM# 973211
  • Spec Code SRB5M
  • Ordering Code EP4CE75F29I8L
  • Stepping A1
  • MDDS Content IDs 699460

Cyclone® IV EP4CE75 FPGA EP4CE75U19I7N

  • MM# 974434
  • Spec Code SRCGZ
  • Ordering Code EP4CE75U19I7N
  • Stepping A1
  • MDDS Content IDs 691755746540

Trade compliance information

  • ECCN 3A991
  • US HTS 8542390001

PCN Information























Drivers and Software

Latest Drivers & Software

Downloads Available:


Launch Date

The date the product was first introduced.


Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.