Cyclone® IV EP4CE55 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Cyclone® IV EP4CE55 FPGA EP4CE55F29C8LN

  • MM# 967042
  • Spec Code SR5WR
  • Ordering Code EP4CE55F29C8LN
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23A7N

  • MM# 967313
  • Spec Code SR64C
  • Ordering Code EP4CE55F23A7N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C7

  • MM# 967314
  • Spec Code SR64D
  • Ordering Code EP4CE55F29C7
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C8L

  • MM# 967315
  • Spec Code SR64E
  • Ordering Code EP4CE55F29C8L
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29I7

  • MM# 967316
  • Spec Code SR64F
  • Ordering Code EP4CE55F29I7
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29I7N

  • MM# 967317
  • Spec Code SR64G
  • Ordering Code EP4CE55F29I7N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C8

  • MM# 970220
  • Spec Code SR8HW
  • Ordering Code EP4CE55F23C8
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C9L

  • MM# 970222
  • Spec Code SR8HY
  • Ordering Code EP4CE55F23C9L
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C6N

  • MM# 970223
  • Spec Code SR8HZ
  • Ordering Code EP4CE55F29C6N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C8

  • MM# 970224
  • Spec Code SR8J0
  • Ordering Code EP4CE55F29C8
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C9L

  • MM# 970225
  • Spec Code SR8J1
  • Ordering Code EP4CE55F29C9L
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C9LN

  • MM# 970226
  • Spec Code SR8J2
  • Ordering Code EP4CE55F29C9LN
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29I8L

  • MM# 970227
  • Spec Code SR8J3
  • Ordering Code EP4CE55F29I8L
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23I7

  • MM# 971167
  • Spec Code SR9DA
  • Ordering Code EP4CE55F23I7
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23I8LN

  • MM# 971168
  • Spec Code SR9DB
  • Ordering Code EP4CE55F23I8LN
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C7N

  • MM# 971169
  • Spec Code SR9DC
  • Ordering Code EP4CE55F29C7N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C8N

  • MM# 971170
  • Spec Code SR9DD
  • Ordering Code EP4CE55F29C8N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55U19I7N

  • MM# 971171
  • Spec Code SR9DE
  • Ordering Code EP4CE55U19I7N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C6

  • MM# 971903
  • Spec Code SRAH0
  • Ordering Code EP4CE55F23C6
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C7N

  • MM# 971904
  • Spec Code SRAH1
  • Ordering Code EP4CE55F23C7N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23I7N

  • MM# 971905
  • Spec Code SRAH2
  • Ordering Code EP4CE55F23I7N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29C6

  • MM# 971906
  • Spec Code SRAH3
  • Ordering Code EP4CE55F29C6
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C6N

  • MM# 972525
  • Spec Code SRAMN
  • Ordering Code EP4CE55F23C6N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23I8L

  • MM# 972526
  • Spec Code SRAMP
  • Ordering Code EP4CE55F23I8L
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F29I8LN

  • MM# 972527
  • Spec Code SRAMQ
  • Ordering Code EP4CE55F29I8LN
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C8L

  • MM# 973202
  • Spec Code SRB5C
  • Ordering Code EP4CE55F23C8L
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C8LN

  • MM# 973203
  • Spec Code SRB5D
  • Ordering Code EP4CE55F23C8LN
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C7

  • MM# 974423
  • Spec Code SRCGN
  • Ordering Code EP4CE55F23C7
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C8N

  • MM# 974424
  • Spec Code SRCGP
  • Ordering Code EP4CE55F23C8N
  • Stepping A1

Cyclone® IV EP4CE55 FPGA EP4CE55F23C9LN

  • MM# 974425
  • Spec Code SRCGQ
  • Ordering Code EP4CE55F23C9LN
  • Stepping A1

Trade compliance information

  • ECCN 3A991
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SR9DA

SRB5D

SRB5C

SR9DE

SR9DD

SR9DC

SR9DB

SRAMQ

SRAMP

SRAMN

SR8J3

SR8J2

SR8J1

SRCGQ

SRAH3

SRCGP

SRAH2

SRAH1

SRCGN

SRAH0

SR5WR

SR8J0

SR64D

SR64C

SR8HZ

SR64G

SR8HY

SR64F

SR64E

SR8HW

Drivers and Software

Latest Drivers & Software

Downloads Available:
All

Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.