Cyclone® V 5CSEA6 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19A7N

  • MM# 965720
  • Spec Code SR4SM
  • Ordering Code 5CSEBA6U19A7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23C8SN

  • MM# 965721
  • Spec Code SR4SN
  • Ordering Code 5CSEBA6U23C8SN
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19C7N

  • MM# 966124
  • Spec Code SR54E
  • Ordering Code 5CSEBA6U19C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6U23C7N

  • MM# 968250
  • Spec Code SR6X3
  • Ordering Code 5CSEMA6U23C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6F31A7N

  • MM# 968384
  • Spec Code SR70V
  • Ordering Code 5CSEMA6F31A7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CSEA6 FPGA 5CSEMA6F31C6N

  • MM# 968385
  • Spec Code SR70W
  • Ordering Code 5CSEMA6F31C6N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CSEA6 FPGA 5CSEMA6U23C8N

  • MM# 968386
  • Spec Code SR70X
  • Ordering Code 5CSEMA6U23C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6U23I7N

  • MM# 968387
  • Spec Code SR70Y
  • Ordering Code 5CSEMA6U23I7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19C6N

  • MM# 968980
  • Spec Code SR7J8
  • Ordering Code 5CSEBA6U19C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19I7N

  • MM# 969112
  • Spec Code SR7N5
  • Ordering Code 5CSEBA6U19I7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19C8N

  • MM# 969113
  • Spec Code SR7N4
  • Ordering Code 5CSEBA6U19C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23C7N

  • MM# 969114
  • Spec Code SR7N7
  • Ordering Code 5CSEBA6U23C7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23C6N

  • MM# 969115
  • Spec Code SR7N6
  • Ordering Code 5CSEBA6U23C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23C8N

  • MM# 969116
  • Spec Code SR7N8
  • Ordering Code 5CSEBA6U23C8N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6U23C6N

  • MM# 969122
  • Spec Code SR7ND
  • Ordering Code 5CSEMA6U23C6N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6F31I7N

  • MM# 969177
  • Spec Code SR7Q2
  • Ordering Code 5CSEMA6F31I7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19I7SN

  • MM# 970636
  • Spec Code SR8VH
  • Ordering Code 5CSEBA6U19I7SN
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23A7N

  • MM# 970637
  • Spec Code SR8VJ
  • Ordering Code 5CSEBA6U23A7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23I7SN

  • MM# 970638
  • Spec Code SR8VK
  • Ordering Code 5CSEBA6U23I7SN
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6F31C7N

  • MM# 970639
  • Spec Code SR8VL
  • Ordering Code 5CSEMA6F31C7N
  • Stepping A1
  • ECCN 3A991

Cyclone® V 5CSEA6 FPGA 5CSEMA6U23A7N

  • MM# 970640
  • Spec Code SR8VM
  • Ordering Code 5CSEMA6U23A7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19C7SN

  • MM# 973779
  • Spec Code SRBN8
  • Ordering Code 5CSEBA6U19C7SN
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U19C8SN

  • MM# 973780
  • Spec Code SRBN9
  • Ordering Code 5CSEBA6U19C8SN
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23C7SN

  • MM# 973781
  • Spec Code SRBNA
  • Ordering Code 5CSEBA6U23C7SN
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEBA6U23I7N

  • MM# 973782
  • Spec Code SRBNB
  • Ordering Code 5CSEBA6U23I7N
  • Stepping A1
  • ECCN EAR99

Cyclone® V 5CSEA6 FPGA 5CSEMA6F31C8N

  • MM# 973784
  • Spec Code SRBND
  • Ordering Code 5CSEMA6F31C8N
  • Stepping A1
  • ECCN 3A991

Trade compliance information

  • ECCN Varies By Product
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SRBNB

SRBNA

SR8VM

SR7Q2

SRBND

SR7J8

SR7N8

SR70Y

SR7N7

SR70X

SR7N6

SR8VL

SR7ND

SR8VK

SRBN9

SR8VJ

SRBN8

SR8VH

SR6X3

SR4SN

SR70W

SR7N5

SR70V

SR7N4

SR54E

SR4SM

Drivers and Software

Latest Drivers & Software

Downloads Available:
All

Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Processor System (HPS)

The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.