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  • Brand Name: Core Ultra

  • Product Number: 6526Y

  • Ordering Code: PK8072205559500

  • SPEC Code: SRN6N

  • Code Name: Emerald Rapids

Cyclone® V 5CGXC7 FPGA

Specifications

Export specifications

Essentials

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Cyclone® V 5CGXC7 FPGA 5CGXBC7C6F23C7N

  • MM# 965697
  • Spec Code SR4RY
  • Ordering Code 5CGXBC7C6F23C7N
  • Stepping A1
  • MDDS Content IDs 694027

Cyclone® V 5CGXC7 FPGA 5CGXBC7C7U19C8N

  • MM# 965698
  • Spec Code SR4RZ
  • Ordering Code 5CGXBC7C7U19C8N
  • Stepping A1
  • MDDS Content IDs 693312

Cyclone® V 5CGXC7 FPGA 5CGXBC7D6F31C7N

  • MM# 965699
  • Spec Code SR4S0
  • Ordering Code 5CGXBC7D6F31C7N
  • Stepping A1
  • MDDS Content IDs 700468

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6F23C6N

  • MM# 965709
  • Spec Code SR4SA
  • Ordering Code 5CGXFC7C6F23C6N
  • Stepping A1
  • MDDS Content IDs 696709

Cyclone® V 5CGXC7 FPGA 5CGXBC7B6M15C7N

  • MM# 965963
  • Spec Code SR4ZQ
  • Ordering Code 5CGXBC7B6M15C7N
  • Stepping A1
  • MDDS Content IDs 724288

Cyclone® V 5CGXC7 FPGA 5CGXBC7D6F27C7N

  • MM# 965964
  • Spec Code SR4ZR
  • Ordering Code 5CGXBC7D6F27C7N
  • Stepping A1
  • MDDS Content IDs 693443

Cyclone® V 5CGXC7 FPGA 5CGXFC7B6M15I7N

  • MM# 965974
  • Spec Code SR501
  • Ordering Code 5CGXFC7B6M15I7N
  • Stepping A1
  • MDDS Content IDs 693458

Cyclone® V 5CGXC7 FPGA 5CGXFC7B7M15C8N

  • MM# 965975
  • Spec Code SR502
  • Ordering Code 5CGXFC7B7M15C8N
  • Stepping A1
  • MDDS Content IDs 699949

Cyclone® V 5CGXC7 FPGA 5CGXFC7C7F23C8N

  • MM# 965976
  • Spec Code SR503
  • Ordering Code 5CGXFC7C7F23C8N
  • Stepping A1
  • MDDS Content IDs 746600,  698145

Cyclone® V 5CGXC7 FPGA 5CGXFC7C7U19C8N

  • MM# 965977
  • Spec Code SR504
  • Ordering Code 5CGXFC7C7U19C8N
  • Stepping A1
  • MDDS Content IDs 698337

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F27C6N

  • MM# 965978
  • Spec Code SR505
  • Ordering Code 5CGXFC7D6F27C6N
  • Stepping A1
  • MDDS Content IDs 745907,  696153

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F31C6N

  • MM# 965979
  • Spec Code SR506
  • Ordering Code 5CGXFC7D6F31C6N
  • Stepping A1
  • MDDS Content IDs 691581

Cyclone® V 5CGXC7 FPGA 5CGXBC7D7F27C8N

  • MM# 968216
  • Spec Code SR6W5
  • Ordering Code 5CGXBC7D7F27C8N
  • Stepping A1
  • MDDS Content IDs 697166

Cyclone® V 5CGXC7 FPGA 5CGXFC7B6M15C7N

  • MM# 968226
  • Spec Code SR6WF
  • Ordering Code 5CGXFC7B6M15C7N
  • Stepping A1
  • MDDS Content IDs 698999

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6F23C7N

  • MM# 968227
  • Spec Code SR6WG
  • Ordering Code 5CGXFC7C6F23C7N
  • Stepping A1
  • MDDS Content IDs 744626,  701183

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F27I7N

  • MM# 968229
  • Spec Code SR6WJ
  • Ordering Code 5CGXFC7D6F27I7N
  • Stepping A1
  • MDDS Content IDs 744709,  700901

Cyclone® V 5CGXC7 FPGA 5CGXFC7D7F31C8N

  • MM# 968230
  • Spec Code SR6WK
  • Ordering Code 5CGXFC7D7F31C8N
  • Stepping A1
  • MDDS Content IDs 745021,  698224

Cyclone® V 5CGXC7 FPGA 5CGXBC7B7M15C8N

  • MM# 968355
  • Spec Code SR706
  • Ordering Code 5CGXBC7B7M15C8N
  • Stepping A1
  • MDDS Content IDs 698840

Cyclone® V 5CGXC7 FPGA 5CGXFC7B6M15I7

  • MM# 968360
  • Spec Code SR70B
  • Ordering Code 5CGXFC7B6M15I7
  • Stepping A1
  • MDDS Content IDs 697406

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6F23I7

  • MM# 968361
  • Spec Code SR70C
  • Ordering Code 5CGXFC7C6F23I7
  • Stepping A1
  • MDDS Content IDs 696003

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F31I7

  • MM# 968362
  • Spec Code SR70D
  • Ordering Code 5CGXFC7D6F31I7
  • Stepping A1
  • MDDS Content IDs 695592

Cyclone® V 5CGXC7 FPGA 5CGXBC7C7F23C8N

  • MM# 968497
  • Spec Code SR745
  • Ordering Code 5CGXBC7C7F23C8N
  • Stepping A1
  • MDDS Content IDs 702813

Cyclone® V 5CGXC7 FPGA 5CGXBC7C6U19C7N

  • MM# 968909
  • Spec Code SR7G6
  • Ordering Code 5CGXBC7C6U19C7N
  • Stepping A1
  • MDDS Content IDs 697860

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F27I7

  • MM# 968922
  • Spec Code SR7GK
  • Ordering Code 5CGXFC7D6F27I7
  • Stepping A1
  • MDDS Content IDs 697310

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F31A7N

  • MM# 968925
  • Spec Code SR7GL
  • Ordering Code 5CGXFC7D6F31A7N
  • Stepping A1
  • MDDS Content IDs 693234

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F31C7N

  • MM# 968969
  • Spec Code SR7HY
  • Ordering Code 5CGXFC7D6F31C7N
  • Stepping A1
  • MDDS Content IDs 745701,  697338

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6U19C7N

  • MM# 969102
  • Spec Code SR7MV
  • Ordering Code 5CGXFC7C6U19C7N
  • Stepping A1
  • MDDS Content IDs 695939

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6F23I7N

  • MM# 969103
  • Spec Code SR7MU
  • Ordering Code 5CGXFC7C6F23I7N
  • Stepping A1
  • MDDS Content IDs 702485,  745888

Cyclone® V 5CGXC7 FPGA 5CGXBC7D7F31C8N

  • MM# 970606
  • Spec Code SR8UM
  • Ordering Code 5CGXBC7D7F31C8N
  • Stepping A1
  • MDDS Content IDs 696744

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6U19A7N

  • MM# 970619
  • Spec Code SR8V0
  • Ordering Code 5CGXFC7C6U19A7N
  • Stepping A1
  • MDDS Content IDs 697182

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6U19C6N

  • MM# 970620
  • Spec Code SR8V1
  • Ordering Code 5CGXFC7C6U19C6N
  • Stepping A1
  • MDDS Content IDs 699062

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6U19I7N

  • MM# 970621
  • Spec Code SR8V2
  • Ordering Code 5CGXFC7C6U19I7N
  • Stepping A1
  • MDDS Content IDs 744911,  695754

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F27C7N

  • MM# 970622
  • Spec Code SR8V3
  • Ordering Code 5CGXFC7D6F27C7N
  • Stepping A1
  • MDDS Content IDs 746512,  692867

Cyclone® V 5CGXC7 FPGA 5CGXFC7D6F31I7N

  • MM# 970623
  • Spec Code SR8V4
  • Ordering Code 5CGXFC7D6F31I7N
  • Stepping A1
  • MDDS Content IDs 746168,  698114

Cyclone® V 5CGXC7 FPGA 5CGXFC7B6M15C6N

  • MM# 973764
  • Spec Code SRBMW
  • Ordering Code 5CGXFC7B6M15C6N
  • Stepping A1
  • MDDS Content IDs 744176,  693242

Cyclone® V 5CGXC7 FPGA 5CGXFC7C6U19I7

  • MM# 973765
  • Spec Code SRBMX
  • Ordering Code 5CGXFC7C6U19I7
  • Stepping A1
  • MDDS Content IDs 691629

Cyclone® V 5CGXC7 FPGA 5CGXFC7D7F27C8N

  • MM# 973766
  • Spec Code SRBMY
  • Ordering Code 5CGXFC7D7F27C8N
  • Stepping A1
  • MDDS Content IDs 746259,  700118

Trade compliance information

  • ECCN 3A991
  • CCATS NA
  • US HTS 8542390001

PCN Information

SR501

SR6W5

SR4S0

SR706

SR4RZ

SR4RY

SR506

SR505

SR504

SR503

SR745

SR502

SR7MV

SR7MU

SRBMY

SRBMX

SR4ZR

SRBMW

SR4ZQ

SR8V4

SR8V3

SR8V2

SR8V1

SR8V0

SR8UM

SR7GL

SR7GK

SR6WG

SR7G6

SR6WF

SR4SA

SR70D

SR6WK

SR70C

SR6WJ

SR70B

SR7HY

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Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count†

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers†

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate†

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.

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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.

Refer to Datasheet for formal definitions of product properties and features.

‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.

“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.