Intel® Cyclone® 10 10CL016 FPGA
Specifications
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Essentials
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Product Collection
Intel® Cyclone® 10 LP FPGA
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Marketing Status
Launched
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Launch Date
2017
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Lithography
60 nm
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Resources
I/O Specifications
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Maximum User I/O Count†
340
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I/O Standards Support
3.0 V to 3.3 V LVTTL, 1.2 V to 3.3 V LVCMOS, PCI, PCI-X, SSTL, HSTL, Differential SSTL, Differential HSTL, LVDS, Mini-LVDS, RSDS, PPDS, LVPECL, BLVDS
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Maximum LVDS Pairs
137
Package Specifications
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Package Options
M164, U256, U484, E144, F484
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
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Ordering and spec information
Intel® Cyclone® 10 10CL016 FPGA 10CL016YM164A7G
- MM# 999A28
- Spec Code SRF4S
- Ordering Code 10CL016YM164A7G
- Stepping A1
- ECCN EAR99
Trade compliance information
- ECCN Varies By Product
- CCATS NA
- US HTS 8542390001
PCN Information
SR4CM
- 965230 PCN
SR4N6
- 965565 PCN
SR4N5
- 965564 PCN
SRF4T
- 999A2A PCN
SRBJM
- 973650 PCN
SRF4S
- 999A28 PCN
SR7D0
- 968800 PCN
SR4CQ
- 965233 PCN
SR4CP
- 965232 PCN
SR4CN
- 965231 PCN
SR4KD
- 965468 PCN
SR7CY
- 968798 PCN
SR4KC
- 965467 PCN
SR7CX
- 968797 PCN
SRF4Z
- 999A2K PCN
SR4KB
- 965466 PCN
SR7CW
- 968796 PCN
SR5YM
- 967113 PCN
SR5YL
- 967112 PCN
SR6SE
- 968088 PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.