Intel® Cyclone® 10 10CL016 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel® Cyclone® 10 10CL016 FPGA 10CL016YM164C6G

  • MM# 965230
  • Spec Code SR4CM
  • Ordering Code 10CL016YM164C6G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YM164I7G

  • MM# 965231
  • Spec Code SR4CN
  • Ordering Code 10CL016YM164I7G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YU256C6G

  • MM# 965232
  • Spec Code SR4CP
  • Ordering Code 10CL016YU256C6G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YU484C6G

  • MM# 965233
  • Spec Code SR4CQ
  • Ordering Code 10CL016YU484C6G
  • Stepping A1
  • ECCN 3A991

Intel® Cyclone® 10 10CL016 FPGA 10CL016ZF484I8G

  • MM# 965468
  • Spec Code SR4KD
  • Ordering Code 10CL016ZF484I8G
  • Stepping A1
  • ECCN 3A991

Intel® Cyclone® 10 10CL016 FPGA 10CL016ZU256I8G

  • MM# 965565
  • Spec Code SR4N6
  • Ordering Code 10CL016ZU256I8G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YU256I7G

  • MM# 967113
  • Spec Code SR5YM
  • Ordering Code 10CL016YU256I7G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YE144C6G

  • MM# 967737
  • Spec Code SR6GL
  • Ordering Code 10CL016YE144C6G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YF484I7G

  • MM# 968088
  • Spec Code SR6SE
  • Ordering Code 10CL016YF484I7G
  • Stepping A1
  • ECCN 3A991

Intel® Cyclone® 10 10CL016 FPGA 10CL016YF484C6G

  • MM# 968797
  • Spec Code SR7CX
  • Ordering Code 10CL016YF484C6G
  • Stepping A1
  • ECCN 3A991

Intel® Cyclone® 10 10CL016 FPGA 10CL016YU484I7G

  • MM# 968798
  • Spec Code SR7CY
  • Ordering Code 10CL016YU484I7G
  • Stepping A1
  • ECCN 3A991

Intel® Cyclone® 10 10CL016 FPGA 10CL016ZE144I8G

  • MM# 968799
  • Spec Code SR7CZ
  • Ordering Code 10CL016ZE144I8G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016ZM164I8G

  • MM# 968800
  • Spec Code SR7D0
  • Ordering Code 10CL016ZM164I8G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YE144I7G

  • MM# 973649
  • Spec Code SRBJL
  • Ordering Code 10CL016YE144I7G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016ZU484I8G

  • MM# 973650
  • Spec Code SRBJM
  • Ordering Code 10CL016ZU484I8G
  • Stepping A1
  • ECCN 3A991

Intel® Cyclone® 10 10CL016 FPGA 10CL016YE144A7G

  • MM# 999A26
  • Spec Code SRF4R
  • Ordering Code 10CL016YE144A7G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YM164A7G

  • MM# 999A28
  • Spec Code SRF4S
  • Ordering Code 10CL016YM164A7G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YU256A7G

  • MM# 999A2A
  • Spec Code SRF4T
  • Ordering Code 10CL016YU256A7G
  • Stepping A1
  • ECCN EAR99

Intel® Cyclone® 10 10CL016 FPGA 10CL016YU484A7G

  • MM# 999A2K
  • Spec Code SRF4Z
  • Ordering Code 10CL016YU484A7G
  • Stepping A1
  • ECCN 3A991

Trade compliance information

  • ECCN Varies By Product
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SR4CM

SR4N6

SR6GL

SRF4T

SRBJM

SRF4S

SRBJL

SRF4R

SR7D0

SR4CQ

SR4CP

SR4CN

SR7CZ

SR4KD

SR7CY

SR7CX

SRF4Z

SR5YM

SR6SE

Drivers and Software

Latest Drivers & Software

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Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.