Arria® V 5AGXA5 FPGA

0 Retailers X

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Arria® V 5AGXA5 FPGA 5AGXMA5G4F31C4G

  • MM# 999G3Z
  • Spec Code SRFND
  • Ordering Code 5AGXMA5G4F31C4G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F35C5G

  • MM# 999G0X
  • Spec Code SRFL7
  • Ordering Code 5AGXBA5D4F35C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXFA5H4F35C4G

  • MM# 999G2D
  • Spec Code SRFM9
  • Ordering Code 5AGXFA5H4F35C4G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXFA5H4F35I5G

  • MM# 970029
  • Spec Code SR8CA
  • Ordering Code 5AGXFA5H4F35I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G4F35C4G

  • MM# 967816
  • Spec Code SR6JX
  • Ordering Code 5AGXMA5G4F35C4G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G4F31I5G

  • MM# 999G41
  • Spec Code SRFNF
  • Ordering Code 5AGXMA5G4F31I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G4F31C5G

  • MM# 984217
  • Spec Code SRER4
  • Ordering Code 5AGXMA5G4F31C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5D6F27C6G

  • MM# 999G3X
  • Spec Code SRFNC
  • Ordering Code 5AGXMA5D6F27C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5D4F27I5G

  • MM# 999G3W
  • Spec Code SRFNB
  • Ordering Code 5AGXMA5D4F27I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F27C5G

  • MM# 999G0M
  • Spec Code SRFL1
  • Ordering Code 5AGXBA5D4F27C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G4F35I5G

  • MM# 967818
  • Spec Code SR6JZ
  • Ordering Code 5AGXMA5G4F35I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXFA5H6F35C6G

  • MM# 999G2G
  • Spec Code SRFMB
  • Ordering Code 5AGXFA5H6F35C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D6F27C6G

  • MM# 999G10
  • Spec Code SRFL9
  • Ordering Code 5AGXBA5D6F27C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5D4F27C4G

  • MM# 970566
  • Spec Code SR8TF
  • Ordering Code 5AGXMA5D4F27C4G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F31C5G

  • MM# 999G0T
  • Spec Code SRFL4
  • Ordering Code 5AGXBA5D4F31C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5D4F27C5G

  • MM# 999G3R
  • Spec Code SRFN9
  • Ordering Code 5AGXMA5D4F27C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F27C4G

  • MM# 999G0L
  • Spec Code SRFL0
  • Ordering Code 5AGXBA5D4F27C4G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F27I5G

  • MM# 999G0P
  • Spec Code SRFL2
  • Ordering Code 5AGXBA5D4F27I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G4F35C5G

  • MM# 999G42
  • Spec Code SRFNG
  • Ordering Code 5AGXMA5G4F35C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F31I5G

  • MM# 999G0V
  • Spec Code SRFL5
  • Ordering Code 5AGXBA5D4F31I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G6F35C6G

  • MM# 999G44
  • Spec Code SRFNJ
  • Ordering Code 5AGXMA5G6F35C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D6F31C6G

  • MM# 999G11
  • Spec Code SRFLA
  • Ordering Code 5AGXBA5D6F31C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G6F31C6G

  • MM# 999G43
  • Spec Code SRFNH
  • Ordering Code 5AGXMA5G6F31C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F35C4G

  • MM# 999G0W
  • Spec Code SRFL6
  • Ordering Code 5AGXBA5D4F35C4G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5G4F31I3G

  • MM# 999G40
  • Spec Code SRFNE
  • Ordering Code 5AGXMA5G4F31I3G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F35I5G

  • MM# 999G0Z
  • Spec Code SRFL8
  • Ordering Code 5AGXBA5D4F35I5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D6F35C6G

  • MM# 999G12
  • Spec Code SRFLB
  • Ordering Code 5AGXBA5D6F35C6G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXFA5H4F35I3G

  • MM# 967797
  • Spec Code SR6JC
  • Ordering Code 5AGXFA5H4F35I3G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXMA5D4F27I3G

  • MM# 999G3T
  • Spec Code SRFNA
  • Ordering Code 5AGXMA5D4F27I3G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXFA5H4F35C5G

  • MM# 999G2F
  • Spec Code SRFMA
  • Ordering Code 5AGXFA5H4F35C5G
  • Stepping A1

Arria® V 5AGXA5 FPGA 5AGXBA5D4F31C4G

  • MM# 999G0R
  • Spec Code SRFL3
  • Ordering Code 5AGXBA5D4F31C4G
  • Stepping A1

Trade compliance information

  • ECCN 3A991
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SRFL9

SRFL8

SRFL7

SRFN9

SRFL6

SRFL5

SR6JC

SRFNF

SRFNE

SRFND

SRFLB

SRFNC

SRFLA

SRFNB

SRFNA

SRFL4

SRFL3

SRFL2

SRFL1

SR8TF

SRFL0

SRER4

SR8CA

SRFM9

SRFMB

SRFMA

SR6JZ

SR6JX

SRFNJ

SRFNH

SRFNG

Drivers and Software

Latest Drivers & Software

Downloads Available:
All

Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.