Intel® Arria® 10 SX 220 FPGA

Specifications

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I/O Specifications

Advanced Technologies

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel® Arria® 10 SX 220 FPGA 10AS022E3F27E1HG

  • MM# 964719
  • Spec Code SR42D
  • Ordering Code 10AS022E3F27E1HG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F27I1HG

  • MM# 964726
  • Spec Code SR42J
  • Ordering Code 10AS022E3F27I1HG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F29I1HG

  • MM# 964731
  • Spec Code SR42P
  • Ordering Code 10AS022E3F29I1HG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022C3U19I2LG

  • MM# 964732
  • Spec Code SR42Q
  • Ordering Code 10AS022C3U19I2LG
  • Stepping A1
  • ECCN EAR99

Intel® Arria® 10 SX 220 FPGA 10AS022C4U19I3LG

  • MM# 964736
  • Spec Code SR42S
  • Ordering Code 10AS022C4U19I3LG
  • Stepping A1
  • ECCN EAR99

Intel® Arria® 10 SX 220 FPGA 10AS022E3F27I2SG

  • MM# 964738
  • Spec Code SR42U
  • Ordering Code 10AS022E3F27I2SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F29E2LG

  • MM# 964739
  • Spec Code SR42V
  • Ordering Code 10AS022E3F29E2LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F27I3SG

  • MM# 964750
  • Spec Code SR42W
  • Ordering Code 10AS022E4F27I3SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022C4U19I3SG

  • MM# 964906
  • Spec Code SR43H
  • Ordering Code 10AS022C4U19I3SG
  • Stepping A1
  • ECCN EAR99

Intel® Arria® 10 SX 220 FPGA 10AS022E3F27E2LG

  • MM# 964907
  • Spec Code SR43J
  • Ordering Code 10AS022E3F27E2LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F27E3LG

  • MM# 964908
  • Spec Code SR43K
  • Ordering Code 10AS022E4F27E3LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F27I3LG

  • MM# 964909
  • Spec Code SR43L
  • Ordering Code 10AS022E4F27I3LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F29I2SG

  • MM# 964921
  • Spec Code SR43Y
  • Ordering Code 10AS022E3F29I2SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F27I2LG

  • MM# 964964
  • Spec Code SR452
  • Ordering Code 10AS022E3F27I2LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022C3U19I2SG

  • MM# 965041
  • Spec Code SR477
  • Ordering Code 10AS022C3U19I2SG
  • Stepping A1
  • ECCN EAR99

Intel® Arria® 10 SX 220 FPGA 10AS022E4F29E3LG

  • MM# 965042
  • Spec Code SR478
  • Ordering Code 10AS022E4F29E3LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F29I3SG

  • MM# 965043
  • Spec Code SR479
  • Ordering Code 10AS022E4F29I3SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F29I3LG

  • MM# 965278
  • Spec Code SR4E0
  • Ordering Code 10AS022E4F29I3LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F27E2SG

  • MM# 973471
  • Spec Code SRBD4
  • Ordering Code 10AS022E3F27E2SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F29E1HG

  • MM# 973472
  • Spec Code SRBD5
  • Ordering Code 10AS022E3F29E1HG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F29E2SG

  • MM# 973473
  • Spec Code SRBD6
  • Ordering Code 10AS022E3F29E2SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E3F29I2LG

  • MM# 973474
  • Spec Code SRBD7
  • Ordering Code 10AS022E3F29I2LG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F27E3SG

  • MM# 973475
  • Spec Code SRBD8
  • Ordering Code 10AS022E4F27E3SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022E4F29E3SG

  • MM# 973476
  • Spec Code SRBD9
  • Ordering Code 10AS022E4F29E3SG
  • Stepping A1
  • ECCN 3A991

Intel® Arria® 10 SX 220 FPGA 10AS022C3U19I2LP

  • MM# 974665
  • Spec Code SRC1R
  • Ordering Code 10AS022C3U19I2LP
  • Stepping A1
  • ECCN EAR99

Trade compliance information

  • ECCN Varies By Product
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SRBD8

SRBD7

SRBD6

SRBD5

SRBD4

SR43Y

SRBD9

SR43L

SR43K

SR43J

SR43H

SR479

SR42S

SR478

SR477

SR42Q

SR42P

SR452

SR42W

SR42V

SR42U

SR42D

SRC1R

SR4E0

SR42J

Drivers and Software

Latest Drivers & Software

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Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Processor System (HPS)

The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.