Intel® Arria® 10 GX 1150 FPGA
Specifications
Compare Intel® Products
Essentials
-
Product Collection
Intel® Arria® 10 GX FPGA
-
Marketing Status
Launched
-
Launch Date
2013
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Lithography
20 nm
Resources
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Logic Elements (LE)
1150000
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Adaptive Logic Modules (ALM)
427200
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Adaptive Logic Module (ALM) Registers
1708800
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Fabric and I/O Phase-Locked Loops (PLLs)
48
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Maximum Embedded Memory
65.7 Mb
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Digital Signal Processing (DSP) Blocks
1518
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Digital Signal Processing (DSP) Format
Multiply, Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR4, DDR3, QDR II, QDR II+, RLDRAM 3, HMC, MoSys, QDR IV, LPDDR3, DDR3L
I/O Specifications
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Maximum User I/O Count†
768
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I/O Standards Support
3.0 V LVTTL, 1.2 V to 3.0 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL
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Maximum LVDS Pairs
384
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Maximum Non-Return to Zero (NRZ) Transceivers†
96
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Maximum Non-Return to Zero (NRZ) Data Rate†
17.4 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3
Advanced Technologies
Package Specifications
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Package Options
F1152, F1517, F1932
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
Ordering and spec information
Intel® Arria® 10 GX 1150 FPGA 10AX115N4F40M3SG
- MM# 99AZGP
- Spec Code SRLZ1
- Ordering Code 10AX115N4F40M3SG
- Stepping A1
- ECCN 3A001.A.7.B
- CCATS G171972
Retired and discontinued
Intel® Arria® 10 GX 1150 FPGA 10AX115N5F40I2SG
- MM# 99A8RF
- Spec Code SRKFZ
- Ordering Code 10AX115N5F40I2SG
- Stepping A1
- ECCN 3A991
- CCATS NA
Trade compliance information
- ECCN Varies By Product
- CCATS Varies By Product
- US HTS 8542390001
PCN Information
SR6VT
- 968204 PCN
SR4K5
- 965459 PCN
SR4K4
- 965458 PCN
SR4K3
- 965457 PCN
SR4K2
- 965456 PCN
SR4K1
- 965455 PCN
SR4K0
- 965454 PCN
SRKFZ
- 99A8RF PCN
SRLZ1
- 99AZGP PCN
SR4CE
- 965223 PCN
SR6GG
- 967733 PCN
SR6GF
- 967731 PCN
SR4CC
- 965221 PCN
SR6GE
- 967730 PCN
SR4CB
- 965220 PCN
SR6GD
- 967729 PCN
SR4CA
- 965219 PCN
SR6GB
- 967727 PCN
SR6GA
- 967726 PCN
SR4CG
- 965225 PCN
SR4CF
- 965224 PCN
SR4C5
- 965213 PCN
SR6G7
- 967723 PCN
SR4C4
- 965212 PCN
SR6G6
- 967722 PCN
SR4C3
- 965211 PCN
SR6G5
- 967721 PCN
SR4C2
- 965208 PCN
SR4JY
- 965452 PCN
SR6G4
- 967720 PCN
SR4JX
- 965451 PCN
SR4K9
- 965464 PCN
SR6G3
- 967719 PCN
SR4K8
- 965462 PCN
SR6G2
- 967718 PCN
SR4K7
- 965461 PCN
SR4K6
- 965460 PCN
SR4C9
- 965218 PCN
SR4KA
- 965465 PCN
SR4C8
- 965217 PCN
SR6G9
- 967725 PCN
SR6G8
- 967724 PCN
SR5XX
- 967083 PCN
SR5Y9
- 967097 PCN
SR5Y8
- 967096 PCN
SR5Y7
- 967093 PCN
SR5Y6
- 967092 PCN
SRBJ9
- 973637 PCN
SRBJ7
- 973634 PCN
SR5YB
- 967101 PCN
SR5YA
- 967098 PCN
SRBJE
- 973643 PCN
SR6S9
- 968083 PCN
SRBJD
- 973642 PCN
SR6S8
- 968082 PCN
SRBJC
- 973641 PCN
SR6BF
- 967557 PCN
SRBJB
- 973639 PCN
SRBJA
- 973638 PCN
SR5XZ
- 967085 PCN
SR6S4
- 968078 PCN
SR7CR
- 968791 PCN
SR7CQ
- 968790 PCN
SR7CP
- 968787 PCN
SR7CN
- 968786 PCN
SR4MZ
- 965558 PCN
SR7CM
- 968785 PCN
SR4MY
- 965557 PCN
SR7CL
- 968784 PCN
SR7CK
- 968783 PCN
SRBJ6
- 973633 PCN
SRBJ5
- 973632 PCN
SRBJ4
- 973631 PCN
SRBJ3
- 973630 PCN
SRBJ2
- 973627 PCN
SR6B5
- 967547 PCN
SRBJ1
- 973626 PCN
SRBJ0
- 973625 PCN
SR7CS
- 968792 PCN
SR4N0
- 965559 PCN
SR7CJ
- 968782 PCN
SR7CH
- 968781 PCN
SR4N2
- 965561 PCN
SR4N1
- 965560 PCN
SR6HS
- 967777 PCN
SR4MF
- 965540 PCN
SR4ME
- 965539 PCN
SR4MD
- 965538 PCN
SR59X
- 966311 PCN
SR59W
- 966310 PCN
SR59V
- 966309 PCN
SR59U
- 966308 PCN
SR6SA
- 968084 PCN
SR5YG
- 967108 PCN
SR5YF
- 967106 PCN
SR5YE
- 967104 PCN
SR5YD
- 967103 PCN
SRBJH
- 973646 PCN
SR5YC
- 967102 PCN
SR6BK
- 967562 PCN
SRBJG
- 973645 PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
Give Feedback
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.