Stratix® V 5SGXA7 FPGA
Specifications
Compare Intel® Products
Export specifications
Essentials
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Product Collection
Stratix® V GX FPGA
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Marketing Status
Launched
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Launch Date
2010
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Lithography
28 nm
Resources
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Logic Elements (LE)
622000
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Adaptive Logic Modules (ALM)
234720
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Adaptive Logic Module (ALM) Registers
938880
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Fabric and I/O Phase-Locked Loops (PLLs)
28
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Maximum Embedded Memory
57.16 Mb
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Digital Signal Processing (DSP) Blocks
256
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Digital Signal Processing (DSP) Format
Multiply and Accumulate, Variable Precision, Fixed Point (hard IP)
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Hard Memory Controllers
No
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External Memory Interfaces (EMIF)
DDR3, DDR2, DDR, QDR II, QDR II+, RLDRAM II, RLDRAM 3
I/O Specifications
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Maximum User I/O Count†
840
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I/O Standards Support
3.0 V LVTTL, 1.2 V to 3.0 V LVCMOS, SSTL, HSTL, HSUL, Differential SSTL, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL, BLVDS
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Maximum LVDS Pairs
420
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Maximum Non-Return to Zero (NRZ) Transceivers†
48
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Maximum Non-Return to Zero (NRZ) Data Rate†
14.1 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3
Package Specifications
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Package Options
F1152, F1517, F1932
Supplemental Information
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Datasheet
Datasheet Group
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Additional Information
Product Table
Ordering and Compliance
Ordering and spec information
Retired and discontinued
Stratix® V 5SGXA7 FPGA 5SGXEA7H3F35M4
- MM# 969047
- Spec Code SR7L6
- Ordering Code 5SGXEA7H3F35M4
- Stepping A1
- ECCN 3A991
- CCATS NA
Stratix® V 5SGXA7 FPGA 5SGXEA7K3F40M4
- MM# 970120
- Spec Code SR8EZ
- Ordering Code 5SGXEA7K3F40M4
- Stepping A1
- ECCN 3A991
- CCATS NA
Stratix® V 5SGXA7 FPGA 5SGXEA7H2F35C1
- MM# 971058