Stratix® V 5SGSD8 FPGA
Specifications
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Essentials
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Product Collection
Stratix® V GS FPGA
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Marketing Status
Launched
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Launch Date
2010
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Lithography
28 nm
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Resources
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Logic Elements (LE)
695000
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Adaptive Logic Modules (ALM)
262400
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Adaptive Logic Module (ALM) Registers
1049600
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Fabric and I/O Phase-Locked Loops (PLLs)
28
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Maximum Embedded Memory
58.01 Mb
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Digital Signal Processing (DSP) Blocks
1963
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Digital Signal Processing (DSP) Format
Multiply and Accumulate, Variable Precision, Fixed Point (hard IP)
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Hard Memory Controllers
No
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External Memory Interfaces (EMIF)
DDR3, DDR2, DDR, QDR II, QDR II+, RLDRAM II, RLDRAM 3
I/O Specifications
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Maximum User I/O Count†
840
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I/O Standards Support
3.0 V LVTTL, 1.2 V to 3.0 V LVCMOS, SSTL, HSTL, HSUL, Differential SSTL, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL, BLVDS
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Maximum LVDS Pairs
420
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Maximum Non-Return to Zero (NRZ) Transceivers†
48
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Maximum Non-Return to Zero (NRZ) Data Rate†
14.1 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3
Package Specifications
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Package Options
F1517, F1932
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
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Ordering and spec information
Stratix® V 5SGSD8 FPGA 5SGSED8N2F45C2LP
- MM# 99A487
- Spec Code SRK1N
- Ordering Code 5SGSED8N2F45C2LP
- Stepping A1
- ECCN 3A001.A.7.A
- CCATS G171972
Stratix® V 5SGSD8 FPGA 5SGSED8N2F45I2LP
- MM# 99A7C1
- Spec Code SRK8L
- Ordering Code 5SGSED8N2F45I2LP
- Stepping A1
- ECCN 3A001.A.7.A
- CCATS G171972
Stratix® V 5SGSD8 FPGA 5SGSMD8N2F45C2LP
- MM# 99AVDV
- Spec Code SRLBN
- Ordering Code 5SGSMD8N2F45C2LP
- Stepping A1
- ECCN 3A001.A.7.A
- CCATS G171972
Retired and discontinued
Trade compliance information
- ECCN Varies By Product
- CCATS Varies By Product
- US HTS 8542390001
PCN Information
SRJVC
- 99A2ZA PCN
SRJVD
- 99A2ZC PCN
SRJVE
- 99A2ZD PCN
SRJVF
- 99A2ZF PCN
SRJUZ
- 99A2XW PCN
SRJVA
- 99A2Z8 PCN
SRJV3
- 99A2Z0 PCN
SRJUS
- 99A2XK PCN
SRJV4
- 99A2Z1 PCN
SRJUT
- 99A2XL PCN
SRJUU
- 99A2XM PCN
SRJV6
- 99A2Z3 PCN
SRJV7
- 99A2Z4 PCN
SRJUX
- 99A2XT PCN
SRJUY
- 99A2XV PCN
SRJUK
- 99A2X9 PCN
SRJUM
- 99A2XD PCN
SRJUP
- 99A2XG PCN
SRJUQ
- 99A2XH PCN
SRJUC
- 99A2X2 PCN
SRJUE
- 99A2X4 PCN
SRJUG
- 99A2X6 PCN
SRJTZ
- 99A2WH PCN
SRJUA
- 99A2WZ PCN
SRJTQ
- 99A2W5 PCN
SRJU3
- 99A2WN PCN
SRK1N
- 99A487 PCN
SRJTT
- 99A2W9 PCN
SRJTU
- 99A2WA PCN
SRJTW
- 99A2WD PCN
SRJU8
- 99A2WW PCN
SRJTJ
- 99A2VX PCN
SRJTK
- 99A2VZ PCN
SRJTM
- 99A2W1 PCN
SRJTP
- 99A2W4 PCN
SRJU1
- 99A2WL PCN
SRJTB
- 99A2VL PCN
SRJTD
- 99A2VN PCN
SRJTF
- 99A2VR PCN
SRJSX
- 99A2V3 PCN
SRJT9
- 99A2VJ PCN
SRJSY
- 99A2V4 PCN
SR804
- 969554 PCN
SR8XZ
- 970720 PCN
SRJSP
- 99A2TR PCN
SRJT3
- 99A2V9 PCN
SRJT5
- 99A2VC PCN
SRJSU
- 99A2TZ PCN
SRJT7
- 99A2VG PCN
SRJSW
- 99A2V2 PCN
SRK8L
- 99A7C1 PCN
SRJSL
- 99A2TM PCN
SRJSN
- 99A2TP PCN
SRJT0
- 99A2V6 PCN
SRJSA
- 99A2T9 PCN
SRLBN
- 99AVDV PCN
SRJSB
- 99A2TA PCN
SR86N
- 969776 PCN
SR7UM
- 969335 PCN
SRJSG
- 99A2TH PCN
SRJRW
- 99A2RT PCN
SRJS8
- 99A2T7 PCN
SRJS0
- 99A2RZ PCN
SRJVS
- 99A2ZW PCN
SRJS1
- 99A2T0 PCN
SRJVT
- 99A2ZX PCN
SRJS3
- 99A2T2 PCN
SRJVV
- 99A301 PCN
SRJRS
- 99A2RM PCN
SRJS4
- 99A2T3 PCN
SRJRT
- 99A2RN PCN
SRJS5
- 99A2T4 PCN
SR81Y
- 969616 PCN
SRJRU
- 99A2RP PCN
SR81X
- 969615 PCN
SR86L
- 969774 PCN
SR86K
- 969773 PCN
SR86J
- 969772 PCN
SRJVM
- 99A2ZN PCN
SRJVQ
- 99A2ZT PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.