Stratix® V 5SGSD5 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C2G

  • MM# 999XLC
  • Spec Code SRHGE
  • Ordering Code 5SGSMD5H1F35C2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C3G

  • MM# 999XLD
  • Spec Code SRHGF
  • Ordering Code 5SGSMD5H2F35C3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I3G

  • MM# 999XLF
  • Spec Code SRHGG
  • Ordering Code 5SGSMD5H2F35I3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C4G

  • MM# 999XLG
  • Spec Code SRHGH
  • Ordering Code 5SGSMD5H3F35C4G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C1G

  • MM# 999XLH
  • Spec Code SRHGJ
  • Ordering Code 5SGSMD5K1F40C1G
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C2G

  • MM# 999XLJ
  • Spec Code SRHGK
  • Ordering Code 5SGSMD5K1F40C2G
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C1G

  • MM# 999XLK
  • Spec Code SRHGL
  • Ordering Code 5SGSMD5K2F40C1G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C1G

  • MM# 999XLZ
  • Spec Code SRHGV
  • Ordering Code 5SGSMD5H2F35C1G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I2G

  • MM# 999XMD
  • Spec Code SRHH5
  • Ordering Code 5SGSMD5K2F40I2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I4G

  • MM# 999XMG
  • Spec Code SRHH6
  • Ordering Code 5SGSMD5K3F40I4G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35I2G

  • MM# 999XMM
  • Spec Code SRHHB
  • Ordering Code 5SGSMD5H1F35I2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C2G

  • MM# 999XMN
  • Spec Code SRHHC
  • Ordering Code 5SGSMD5H2F35C2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I2LG

  • MM# 999XMP
  • Spec Code SRHHD
  • Ordering Code 5SGSMD5H2F35I2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I3LG

  • MM# 999XMR
  • Spec Code SRHHE
  • Ordering Code 5SGSMD5H2F35I3LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I4G

  • MM# 999XMT
  • Spec Code SRHHF
  • Ordering Code 5SGSMD5H3F35I4G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C2LG

  • MM# 999XN6
  • Spec Code SRHHR
  • Ordering Code 5SGSMD5K1F40C2LG
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C2G

  • MM# 999XN8
  • Spec Code SRHHS
  • Ordering Code 5SGSMD5K2F40C2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C2LG

  • MM# 999XN9
  • Spec Code SRHHT
  • Ordering Code 5SGSMD5K2F40C2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I2G

  • MM# 999XNZ
  • Spec Code SRHJA
  • Ordering Code 5SGSMD5H2F35I2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C2LG

  • MM# 999XP0
  • Spec Code SRHJB
  • Ordering Code 5SGSMD5H3F35C2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C3G

  • MM# 999XP2
  • Spec Code SRHJC
  • Ordering Code 5SGSMD5H3F35C3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40I2G

  • MM# 999XP3
  • Spec Code SRHJD
  • Ordering Code 5SGSMD5K1F40I2G
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C3G

  • MM# 999XP4
  • Spec Code SRHJE
  • Ordering Code 5SGSMD5K2F40C3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I3LG

  • MM# 999XPG
  • Spec Code SRHJP
  • Ordering Code 5SGSMD5H3F35I3LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C2G

  • MM# 999XPH
  • Spec Code SRHJQ
  • Ordering Code 5SGSMD5K3F40C2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C3G

  • MM# 999XT3
  • Spec Code SRHKX
  • Ordering Code 5SGSMD5K3F40C3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C4G

  • MM# 999XT4
  • Spec Code SRHKY
  • Ordering Code 5SGSMD5K3F40C4G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3G

  • MM# 999XT5
  • Spec Code SRHKZ
  • Ordering Code 5SGSMD5K3F40I3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3LG

  • MM# 999XT6
  • Spec Code SRHL0
  • Ordering Code 5SGSMD5K3F40I3LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I2LG

  • MM# 999Z18
  • Spec Code SRHQD
  • Ordering Code 5SGSMD5K2F40I2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I3G

  • MM# 999Z19
  • Spec Code SRHQE
  • Ordering Code 5SGSMD5K2F40I3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I3LG

  • MM# 999Z1A
  • Spec Code SRHQF
  • Ordering Code 5SGSMD5K2F40I3LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C2LG

  • MM# 999Z1C
  • Spec Code SRHQG
  • Ordering Code 5SGSMD5K3F40C2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C1G

  • MM# 999Z1H
  • Spec Code SRHQL
  • Ordering Code 5SGSMD5H1F35C1G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C2LG

  • MM# 999Z1K
  • Spec Code SRHQM
  • Ordering Code 5SGSMD5H1F35C2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C2LG

  • MM# 999Z1L
  • Spec Code SRHQN
  • Ordering Code 5SGSMD5H2F35C2LG
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C2G

  • MM# 999Z1M
  • Spec Code SRHQP
  • Ordering Code 5SGSMD5H3F35C2G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I3G

  • MM# 999Z1N
  • Spec Code SRHQQ
  • Ordering Code 5SGSMD5H3F35I3G
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3P

  • MM# 99A5TR
  • Spec Code SRK43
  • Ordering Code 5SGSMD5K3F40I3P
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Retired and discontinued

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C1N

  • MM# 965796
  • Spec Code SR4UV
  • Ordering Code 5SGSMD5H1F35C1N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C2L

  • MM# 965797
  • Spec Code SR4UW
  • Ordering Code 5SGSMD5H1F35C2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C2LN

  • MM# 965798
  • Spec Code SR4UX
  • Ordering Code 5SGSMD5H1F35C2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I3NYY

  • MM# 965800
  • Spec Code SR4UZ
  • Ordering Code 5SGSMD5H3F35I3NYY
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40I2

  • MM# 965802
  • Spec Code SR4V1
  • Ordering Code 5SGSMD5K1F40I2
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I3L

  • MM# 965803
  • Spec Code SR4V2
  • Ordering Code 5SGSMD5K2F40I3L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35C2N

  • MM# 966196
  • Spec Code SR56J
  • Ordering Code 5SGSMD5H1F35C2N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C2LN

  • MM# 966197
  • Spec Code SR56K
  • Ordering Code 5SGSMD5H2F35C2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C2

  • MM# 966200
  • Spec Code SR56N
  • Ordering Code 5SGSMD5K1F40C2
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C1

  • MM# 966203
  • Spec Code SR56R
  • Ordering Code 5SGSMD5K2F40C1
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C3N

  • MM# 966269
  • Spec Code SR58P
  • Ordering Code 5SGSMD5K2F40C3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C2N

  • MM# 968492
  • Spec Code SR740
  • Ordering Code 5SGSMD5H2F35C2N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C2N

  • MM# 968494
  • Spec Code SR742
  • Ordering Code 5SGSMD5H3F35C2N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I3

  • MM# 968502
  • Spec Code SR74A
  • Ordering Code 5SGSMD5K2F40I3
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C1N

  • MM# 968519
  • Spec Code SR74T
  • Ordering Code 5SGSMD5H2F35C1N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I2L

  • MM# 968520
  • Spec Code SR74U
  • Ordering Code 5SGSMD5H2F35I2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I2N

  • MM# 968521
  • Spec Code SR74V
  • Ordering Code 5SGSMD5H2F35I2N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I4

  • MM# 968523
  • Spec Code SR74X
  • Ordering Code 5SGSMD5H3F35I4
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C2

  • MM# 968525
  • Spec Code SR74Z
  • Ordering Code 5SGSMD5K2F40C2
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C2L

  • MM# 968526
  • Spec Code SR750
  • Ordering Code 5SGSMD5K2F40C2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C2LN

  • MM# 968527
  • Spec Code SR751
  • Ordering Code 5SGSMD5K2F40C2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I3LN

  • MM# 968528
  • Spec Code SR752
  • Ordering Code 5SGSMD5K2F40I3LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3

  • MM# 968530
  • Spec Code SR754
  • Ordering Code 5SGSMD5K3F40I3
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3L

  • MM# 968531
  • Spec Code SR755
  • Ordering Code 5SGSMD5K3F40I3L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C3N

  • MM# 968769
  • Spec Code SR7C5
  • Ordering Code 5SGSMD5K3F40C3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C4

  • MM# 968770
  • Spec Code SR7C6
  • Ordering Code 5SGSMD5K3F40C4
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C2LN

  • MM# 969598
  • Spec Code SR81E
  • Ordering Code 5SGSMD5H3F35C2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I3L

  • MM# 969599
  • Spec Code SR81F
  • Ordering Code 5SGSMD5H3F35I3L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C2L

  • MM# 969600
  • Spec Code SR81G
  • Ordering Code 5SGSMD5K1F40C2L
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C3

  • MM# 969602
  • Spec Code SR81J
  • Ordering Code 5SGSMD5K2F40C3
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I3N

  • MM# 969604
  • Spec Code SR81L
  • Ordering Code 5SGSMD5K2F40I3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C2

  • MM# 969605
  • Spec Code SR81M
  • Ordering Code 5SGSMD5K3F40C2
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C2LN

  • MM# 969606
  • Spec Code SR81N
  • Ordering Code 5SGSMD5K3F40C2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C4N

  • MM# 969608
  • Spec Code SR81Q
  • Ordering Code 5SGSMD5K3F40C4N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H1F35I2N

  • MM# 969804
  • Spec Code SR87G
  • Ordering Code 5SGSMD5H1F35I2N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C3N

  • MM# 969807
  • Spec Code SR87K
  • Ordering Code 5SGSMD5H2F35C3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I2LN

  • MM# 969808
  • Spec Code SR87L
  • Ordering Code 5SGSMD5H2F35I2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C2LN

  • MM# 969812
  • Spec Code SR87Q
  • Ordering Code 5SGSMD5K1F40C2LN
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I2LN

  • MM# 969816
  • Spec Code SR87U
  • Ordering Code 5SGSMD5K2F40I2LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C3

  • MM# 969820
  • Spec Code SR87Y
  • Ordering Code 5SGSMD5K3F40C3
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3LN

  • MM# 969821
  • Spec Code SR87Z
  • Ordering Code 5SGSMD5K3F40I3LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I4

  • MM# 969823
  • Spec Code SR881
  • Ordering Code 5SGSMD5K3F40I4
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I3LN

  • MM# 970700
  • Spec Code SR8XD
  • Ordering Code 5SGSMD5H2F35I3LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I3N

  • MM# 970701
  • Spec Code SR8XE
  • Ordering Code 5SGSMD5H2F35I3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C3N

  • MM# 970702
  • Spec Code SR8XF
  • Ordering Code 5SGSMD5H3F35C3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35C4N

  • MM# 970703
  • Spec Code SR8XG
  • Ordering Code 5SGSMD5H3F35C4N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35I3LN

  • MM# 970704
  • Spec Code SR8XH
  • Ordering Code 5SGSMD5H3F35I3LN
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I2

  • MM# 970708
  • Spec Code SR8XM
  • Ordering Code 5SGSMD5K2F40I2
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40I2L

  • MM# 970709
  • Spec Code SR8XN
  • Ordering Code 5SGSMD5K2F40I2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40C2L

  • MM# 970710
  • Spec Code SR8XP
  • Ordering Code 5SGSMD5K3F40C2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I3N

  • MM# 970711
  • Spec Code SR8XQ
  • Ordering Code 5SGSMD5K3F40I3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35C2L

  • MM# 973838
  • Spec Code SRBPZ
  • Ordering Code 5SGSMD5H2F35C2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H2F35I3L

  • MM# 973840
  • Spec Code SRBQ1
  • Ordering Code 5SGSMD5H2F35I3L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40C1

  • MM# 973842
  • Spec Code SRBQ3
  • Ordering Code 5SGSMD5K1F40C1
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K1F40I2N

  • MM# 973845
  • Spec Code SRBQ5
  • Ordering Code 5SGSMD5K1F40I2N
  • Stepping A1
  • ECCN 3A001.A.7.B
  • CCATS G171972

Stratix® V 5SGSD5 FPGA 5SGSMD5K2F40C1N

  • MM# 973846
  • Spec Code SRBQ6
  • Ordering Code 5SGSMD5K2F40C1N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40I4N

  • MM# 973850
  • Spec Code SRBQA
  • Ordering Code 5SGSMD5K3F40I4N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5H3F35M4

  • MM# 974708
  • Spec Code SRC2Z
  • Ordering Code 5SGSMD5H3F35M4
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Stratix® V 5SGSD5 FPGA 5SGSMD5K3F40M4

  • MM# 974709
  • Spec Code SRC30
  • Ordering Code 5SGSMD5K3F40M4
  • Stepping A1
  • ECCN 3A991
  • CCATS NA

Trade compliance information

  • ECCN Varies By Product
  • CCATS Varies By Product
  • US HTS 8542390001

PCN/MDDS Information

SR81N

SR81M

SR81L

SR81J

SR81Q

SRHQN

SRHQM

SRHQL

SR81G

SR81F

SR81E

SRHQQ

SRHQP

SRHHT

SRHHS

SRHHR

SRHQG

SRHQF

SRHQE

SRHQD

SRHHF

SRHHE

SRHHD

SRHHC

SRHHB

SRHKY

SRHKX

SRHKZ

SRHL0

SRHJQ

SRHJE

SRHJD

SRHJC

SRHJB

SRHJA

SRHJP

SR742

SR740

SRC30

SRC2Z

SR4UW

SR4UV

SRBQA

SR56R

SR4V2

SR4V1

SR4UZ

SR4UX

SRBQ5

SRBQ3

SRBQ1

SR56N

SRBPZ

SR56K

SR7C6

SR56J

SR7C5

SRBQ6

SR87U

SRHH6

SRHH5

SR87Q

SR881

SR8XQ

SR8XP

SR87Z

SR87Y

SRHGV

SR8XF

SRHGE

SR8XE

SR8XD

SR8XN

SR87L

SR8XM

SRHGL

SR87K

SRHGK

SRHGJ

SRHGH

SR87G

SR8XH

SRHGG

SR8XG

SRHGF

SR754

SR752

SR751

SR750

SR74Z

SR74X

SR74V

SR74U

SR74T

SR755

SR74A

SRK43

SR58P

Drivers and Software

Latest Drivers & Software

Downloads Available:
All

Name

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.