Intel® Stratix® 10 SX 2500 FPGA
Specifications
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Essentials
-
Product Collection
Intel® Stratix® 10 SX SoC FPGA
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Marketing Status
Launched
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Launch Date
2013
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Lithography
14 nm
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Resources
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Logic Elements (LE)
2422000
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Adaptive Logic Modules (ALM)
821150
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Adaptive Logic Module (ALM) Registers
3284600
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Fabric and I/O Phase-Locked Loops (PLLs)
24
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Maximum Embedded Memory
208 Mb
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Digital Signal Processing (DSP) Blocks
5011
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Digital Signal Processing (DSP) Format
Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
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Hard Processor System (HPS)
Quad-core 64-bit ARM* Cortex*-A53
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR4, DDR3, DDR2, DDR, QDR II, QDR II+, RLDRAM II, RLDRAM 3, HMC, MoSys
I/O Specifications
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Maximum User I/O Count†
1160
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I/O Standards Support
3.0 V to 3.3 V LVTTL, 1.2 V to 3.3V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL
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Maximum LVDS Pairs
576
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Maximum Non-Return to Zero (NRZ) Transceivers†
96
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Maximum Non-Return to Zero (NRZ) Data Rate†
28.3 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3, 100G Ethernet
Advanced Technologies
Package Specifications
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Package Options
F1760, F2397, F2912
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
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Ordering and spec information
Intel® Stratix® 10 SX 2500 FPGA 1SX250HN3F43I2LPAS
- MM# 999MZJ
- Spec Code SRGV4
- Ordering Code 1SX250HN3F43I2LPAS
- Stepping C2
Trade compliance information
- ECCN 5A002U
- CCATS G178951
- US HTS 8542390001
PCN Information
SR3PS
- 960511 PCN
SRD9K
- 981259 PCN
SR3PR
- 960508 PCN
SRD9J
- 981258 PCN
SR3PQ
- 960495 PCN
SR3PP
- 960489 PCN
SRD9H
- 981257 PCN
SRD9G
- 981256 PCN
SR3PN
- 960488 PCN
SRD9F
- 981255 PCN
SR3PM
- 960486 PCN
SRD9E
- 981254 PCN
SRD9D
- 981253 PCN
SRD9S
- 981266 PCN
SRD9R
- 981265 PCN
SRD9Q
- 981264 PCN
SRD9P
- 981263 PCN
SRD9N
- 981262 PCN
SRD9M
- 981261 PCN
SRD9L
- 981260 PCN
SRD8Z
- 981239 PCN
SRD8Y
- 981238 PCN
SRD8X
- 981237 PCN
SRD99
- 981249 PCN
SRD8W
- 981236 PCN
SRD98
- 981248 PCN
SRD8V
- 981235 PCN
SRD97
- 981247 PCN
SRD8U
- 981234 PCN
SRD96
- 981246 PCN
SRD8T
- 981233 PCN
SRD95
- 981245 PCN
SRD8S
- 981232 PCN
SRD94
- 981244 PCN
SRD9C
- 981252 PCN
SRD9B
- 981251 PCN
SRD9A
- 981250 PCN
SRD8J
- 981213 PCN
SRDA3
- 981277 PCN
SR3P2
- 960436 PCN
SRDA2
- 981276 PCN
SR3P1
- 960435 PCN
SRD8H
- 981210 PCN
SRDA1
- 981275 PCN
SR3P0
- 960434 PCN
SRD8G
- 981208 PCN
SRDA0
- 981274 PCN
SRD8F
- 981207 PCN
SRD8E
- 981200 PCN
SRD8D
- 981199 PCN
SRD8R
- 981231 PCN
SRD93
- 981243 PCN
SRD8Q
- 981226 PCN
SRD92
- 981242 PCN
SRD8P
- 981220 PCN
SRD91
- 981241 PCN
SRD90
- 981240 PCN
SRD8N
- 981219 PCN
SRD8M
- 981216 PCN
SRD8L
- 981215 PCN
SRDA5
- 981279 PCN
SRD8K
- 981214 PCN
SRDA4
- 981278 PCN
SR3NZ
- 960433 PCN
SRDCB
- 981353 PCN
SRDCK
- 981361 PCN
SRDCJ
- 981360 PCN
SRDCH
- 981359 PCN
SRDCG
- 981358 PCN
SRD9Z
- 981273 PCN
SRD9Y
- 981272 PCN
SRD9X
- 981271 PCN
SRD9W
- 981270 PCN
SRD9V
- 981269 PCN
SRD9U
- 981268 PCN
SRD9T
- 981267 PCN
SR3DF
- 956167 PCN
SR3DE
- 956166 PCN
SR3DD
- 956165 PCN
SR3DC
- 956164 PCN
SR3DB
- 956163 PCN
SR3DA
- 956162 PCN
SR3D7
- 956159 PCN
SR3D6
- 956158 PCN
SR3D9
- 956161 PCN
SR3D8
- 956160 PCN
SR3C6
- 956121 PCN
SR3C5
- 956120 PCN
SR3C4
- 956119 PCN
SR3C3
- 956118 PCN
SR3C2
- 956117 PCN
SR3C1
- 956116 PCN
SR3C0
- 956115 PCN
SR3C9
- 956124 PCN
SR3C8
- 956123 PCN
SR3C7
- 956122 PCN
SR3NY
- 960432 PCN
SR3NX
- 960431 PCN
SRGV4
- 999MZJ PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Processor System (HPS)
The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
Hyper-Registers
Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.