Intel® Stratix® 10 SX 850 FPGA

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Ordering and spec information

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43E1VG

  • MM# 983724
  • Spec Code SRENL
  • Ordering Code 1SX085HN3F43E1VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I1VG

  • MM# 983730
  • Spec Code SRENR
  • Ordering Code 1SX085HN3F43I1VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43E2VG

  • MM# 983720
  • Spec Code SRENG
  • Ordering Code 1SX085HN2F43E2VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN1F43I1VG

  • MM# 983704
  • Spec Code SRENB
  • Ordering Code 1SX085HN1F43I1VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43E2VG

  • MM# 983726
  • Spec Code SRENN
  • Ordering Code 1SX085HN3F43E2VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I3XG

  • MM# 983734
  • Spec Code SRENV
  • Ordering Code 1SX085HN3F43I3XG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I2LGBK

  • MM# 99A7MJ
  • Spec Code SRKC1
  • Ordering Code 1SX085HN2F43I2LGBK
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I2VG

  • MM# 983732
  • Spec Code SRENT
  • Ordering Code 1SX085HN3F43I2VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I2VGBK

  • MM# 99A7MN
  • Spec Code SRKC2
  • Ordering Code 1SX085HN2F43I2VGBK
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43E3XG

  • MM# 983729
  • Spec Code SRENQ
  • Ordering Code 1SX085HN3F43E3XG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43E1VG

  • MM# 983718
  • Spec Code SRENE
  • Ordering Code 1SX085HN2F43E1VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I3VGBK

  • MM# 99A7MW
  • Spec Code SRKC3
  • Ordering Code 1SX085HN3F43I3VGBK
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I2VG

  • MM# 983723
  • Spec Code SRENK
  • Ordering Code 1SX085HN2F43I2VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I2LG

  • MM# 983722
  • Spec Code SRENJ
  • Ordering Code 1SX085HN2F43I2LG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43E2LG

  • MM# 983725
  • Spec Code SRENM
  • Ordering Code 1SX085HN3F43E2LG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN1F43I2VG

  • MM# 983717
  • Spec Code SREND
  • Ordering Code 1SX085HN1F43I2VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN1F43E2VG

  • MM# 983701
  • Spec Code SRENA
  • Ordering Code 1SX085HN1F43E2VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43E3VG

  • MM# 983728
  • Spec Code SRENP
  • Ordering Code 1SX085HN3F43E3VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I2LG

  • MM# 983731
  • Spec Code SRENS
  • Ordering Code 1SX085HN3F43I2LG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN1F43E1VG

  • MM# 983696
  • Spec Code SREN8
  • Ordering Code 1SX085HN1F43E1VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I1VG

  • MM# 983721
  • Spec Code SRENH
  • Ordering Code 1SX085HN2F43I1VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43E3VGAS

  • MM# 999N3R
  • Spec Code SRGVK
  • Ordering Code 1SX085HN3F43E3VGAS
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN1F43I2LG

  • MM# 983713
  • Spec Code SRENC
  • Ordering Code 1SX085HN1F43I2LG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I2LGAS

  • MM# 999GHJ
  • Spec Code SRFWH
  • Ordering Code 1SX085HN2F43I2LGAS
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43E2LG

  • MM# 983719
  • Spec Code SRENF
  • Ordering Code 1SX085HN2F43E2LG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN1F43E2LG

  • MM# 983699
  • Spec Code SREN9
  • Ordering Code 1SX085HN1F43E2LG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I3VG

  • MM# 983733
  • Spec Code SRENU
  • Ordering Code 1SX085HN3F43I3VG
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN3F43I3VGAS

  • MM# 986639
  • Spec Code SRF07
  • Ordering Code 1SX085HN3F43I3VGAS
  • Stepping A1

Intel® Stratix® 10 SX 850 FPGA 1SX085HN2F43I2VGAS

  • MM# 986638
  • Spec Code SRF06
  • Ordering Code 1SX085HN2F43I2VGAS
  • Stepping A1

Trade compliance information

  • ECCN 5A002U
  • CCATS G178951
  • US HTS 8542390001

PCN/MDDS Information

SREN9

SREN8

SRENG

SRENF

SRENE

SRGVK

SREND

SRENC

SRENB

SRENA

SRKC1

SRKC2

SRKC3

SRFWH

SRENN

SRENM

SRENL

SRENK

SRENJ

SRENH

SRENV

SRF07

SRENU

SRF06

SRENT

SRENS

SRENR

SRENQ

SRENP

Drivers and Software

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Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Processor System (HPS)

The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Hyper-Registers

Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.