Intel® Stratix® 10 GX 1100 FPGA
Specifications
Compare Intel® Products
Essentials
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Product Collection
Intel® Stratix® 10 GX FPGA
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Marketing Status
Launched
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Launch Date
2013
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Lithography
14 nm
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Resources
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Logic Elements (LE)
1325000
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Adaptive Logic Modules (ALM)
449280
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Adaptive Logic Module (ALM) Registers
1797120
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Fabric and I/O Phase-Locked Loops (PLLs)
16
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Maximum Embedded Memory
114 Mb
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Digital Signal Processing (DSP) Blocks
2592
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Digital Signal Processing (DSP) Format
Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR, DDR2, DDR3, DDR4, HMC, MoSys, QDR II, QDR II+, RLDRAM II, RLDRAM 3
I/O Specifications
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Maximum User I/O Count†
688
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I/O Standards Support
3.0 V to 3.3 V LVTTL, 1.2 V to 3.3V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL
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Maximum LVDS Pairs
336
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Maximum Non-Return to Zero (NRZ) Transceivers†
48
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Maximum Non-Return to Zero (NRZ) Data Rate†
28.3 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3, 100G Ethernet
Advanced Technologies
Package Specifications
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Package Options
F1760
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
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Ordering and spec information
Trade compliance information
- ECCN 3A001.A.7.B
- CCATS G171972
- US HTS 8542390001
PCN Information
SRFXH
- 999GKH PCN
SREMZ
- 983686 PCN
SREMY
- 983685 PCN
SREMX
- 983684 PCN
SREMW
- 983683 PCN
SRFXJ
- 999GKJ PCN
SREMN
- 983676 PCN
SREMM
- 983675 PCN
SRGMF
- 999L18 PCN
SREMV
- 983682 PCN
SREN7
- 983695 PCN
SRKC7
- 99A7N9 PCN
SREMU
- 983681 PCN
SREN6
- 983694 PCN
SREMT
- 983680 PCN
SREN5
- 983693 PCN
SREMS
- 983679 PCN
SREN4
- 983692 PCN
SREMR
- 983678 PCN
SREN3
- 983691 PCN
SREMQ
- 983677 PCN
SREN2
- 983690 PCN
SREN1
- 983689 PCN
SREN0
- 983687 PCN
SRKBN
- 99A7M4 PCN
SRFWF
- 999GHH PCN
SRFWE
- 999GHG PCN
SRKBP
- 99A7M5 PCN
SRFWD
- 999GHF PCN
SRKC4
- 99A7N5 PCN
SRKC5
- 99A7N7 PCN
SRKC6
- 99A7N8 PCN
SRKBK
- 99A7M1 PCN
SRGWH
- 999N6A PCN
SRKBL
- 99A7M2 PCN
SRKBM
- 99A7M3 PCN
SRF05
- 986635 PCN
SRH25
- 999T5F PCN
SRF04
- 986634 PCN
SRF03
- 986633 PCN
SRF02
- 986629 PCN
Drivers and Software
Description
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
Hyper-Registers
Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.