Intel® Stratix® 10 GX 2100 FPGA

Intel® Stratix® 10 GX 2100 FPGA

Specifications

Resources

I/O Specifications

Advanced Technologies

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN1F43E2VG

  • MM# 981025
  • Spec Code SRD52
  • Ordering Code 1SG210HN1F43E2VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN1F43I2VG

  • MM# 981026
  • Spec Code SRD53
  • Ordering Code 1SG210HN1F43I2VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN2F43E2VG

  • MM# 981027
  • Spec Code SRD54
  • Ordering Code 1SG210HN2F43E2VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN2F43I2VG

  • MM# 981028
  • Spec Code SRD55
  • Ordering Code 1SG210HN2F43I2VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN3F43E2VG

  • MM# 981029
  • Spec Code SRD56
  • Ordering Code 1SG210HN3F43E2VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN3F43E3VG

  • MM# 981030
  • Spec Code SRD57
  • Ordering Code 1SG210HN3F43E3VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN3F43I2VG

  • MM# 981060
  • Spec Code SRD58
  • Ordering Code 1SG210HN3F43I2VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN3F43I3VG

  • MM# 981061
  • Spec Code SRD59
  • Ordering Code 1SG210HN3F43I3VG
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU1F50E2VG

  • MM# 981062
  • Spec Code SRD5A
  • Ordering Code 1SG210HU1F50E2VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU1F50I2VG

  • MM# 981063
  • Spec Code SRD5B
  • Ordering Code 1SG210HU1F50I2VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU2F50E2VG

  • MM# 981064
  • Spec Code SRD5C
  • Ordering Code 1SG210HU2F50E2VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU2F50I2VG

  • MM# 981065
  • Spec Code SRD5D
  • Ordering Code 1SG210HU2F50I2VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU3F50E2VG

  • MM# 981068
  • Spec Code SRD5E
  • Ordering Code 1SG210HU3F50E2VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU3F50E3VG

  • MM# 981069
  • Spec Code SRD5F
  • Ordering Code 1SG210HU3F50E3VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU3F50I2VG

  • MM# 981070
  • Spec Code SRD5G
  • Ordering Code 1SG210HU3F50I2VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU3F50I3VG

  • MM# 981074
  • Spec Code SRD5H
  • Ordering Code 1SG210HU3F50I3VG
  • Stepping C2
  • ECCN 3A001.A.7.A

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN1F43E1VG

  • MM# 986271
  • Spec Code SREX8
  • Ordering Code 1SG211HN1F43E1VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN1F43E2LG

  • MM# 986272
  • Spec Code SREX9
  • Ordering Code 1SG211HN1F43E2LG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN1F43E2VG

  • MM# 986276
  • Spec Code SREXA
  • Ordering Code 1SG211HN1F43E2VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN1F43I1VG

  • MM# 986287
  • Spec Code SREXB
  • Ordering Code 1SG211HN1F43I1VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN1F43I2LG

  • MM# 986295
  • Spec Code SREXC
  • Ordering Code 1SG211HN1F43I2LG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN1F43I2VG

  • MM# 986296
  • Spec Code SREXD
  • Ordering Code 1SG211HN1F43I2VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN2F43E1VG

  • MM# 986298
  • Spec Code SREXE
  • Ordering Code 1SG211HN2F43E1VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN2F43E2LG

  • MM# 986301
  • Spec Code SREXF
  • Ordering Code 1SG211HN2F43E2LG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN2F43E2VG

  • MM# 986302
  • Spec Code SREXG
  • Ordering Code 1SG211HN2F43E2VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN2F43I1VG

  • MM# 986303
  • Spec Code SREXH
  • Ordering Code 1SG211HN2F43I1VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN2F43I2LG

  • MM# 986304
  • Spec Code SREXJ
  • Ordering Code 1SG211HN2F43I2LG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN2F43I2VG

  • MM# 986314
  • Spec Code SREXK
  • Ordering Code 1SG211HN2F43I2VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43E1VG

  • MM# 986315
  • Spec Code SREXL
  • Ordering Code 1SG211HN3F43E1VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43E2LG

  • MM# 986316
  • Spec Code SREXM
  • Ordering Code 1SG211HN3F43E2LG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43E2VG

  • MM# 986317
  • Spec Code SREXN
  • Ordering Code 1SG211HN3F43E2VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43E3VG

  • MM# 986318
  • Spec Code SREXP
  • Ordering Code 1SG211HN3F43E3VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43E3XG

  • MM# 986319
  • Spec Code SREXQ
  • Ordering Code 1SG211HN3F43E3XG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43I1VG

  • MM# 986320
  • Spec Code SREXR
  • Ordering Code 1SG211HN3F43I1VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43I2LG

  • MM# 986324
  • Spec Code SREXS
  • Ordering Code 1SG211HN3F43I2LG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43I2VG

  • MM# 986327
  • Spec Code SREXT
  • Ordering Code 1SG211HN3F43I2VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43I3VG

  • MM# 986330
  • Spec Code SREXU
  • Ordering Code 1SG211HN3F43I3VG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG211HN3F43I3XG

  • MM# 986332
  • Spec Code SREXV
  • Ordering Code 1SG211HN3F43I3XG
  • Stepping B0
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN2F43E2VGAS

  • MM# 999A31
  • Spec Code SRF5G
  • Ordering Code 1SG210HN2F43E2VGAS
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HN2F43I2VGAS

  • MM# 999A32
  • Spec Code SRF5H
  • Ordering Code 1SG210HN2F43I2VGAS
  • Stepping C2
  • ECCN 3A001.A.7.B

Intel® Stratix® 10 GX 2100 FPGA 1SG210HU1F50E2VGAS

  • MM# 999A34
  • Spec Code SRF5J
  • Ordering Code 1SG210HU1F50E2VGAS
  • Stepping C2
  • ECCN 3A001.A.7.A

Trade compliance information

  • ECCN Varies By Product
  • CCATS G171972
  • US HTS 8542390001

PCN/MDDS Information

SRD5G

SRD5F

SREXH

SRD5E

SREXG

SRD5D

SREXF

SRD5C

SREXE

SRD5B

SREXD

SRD5A

SREXC

SREXB

SREXQ

SREXP

SREXN

SRF5J

SREXM

SREXL

SRF5H

SREXK

SRF5G

SRD5H

SREXJ

SRD57

SREX9

SRD56

SREX8

SRD55

SRD54

SRD53

SRD52

SREXA

SRD59

SRD58

SREXV

SREXU

SREXT

SREXS

SREXR

Drivers and Software

Latest Drivers & Software

Downloads Available:
All

Name

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Hyper-Registers

Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.