Intel® Stratix® 10 GX 400 FPGA
Specifications
Compare Intel® Products
Essentials
-
Product Collection
Intel® Stratix® 10 GX FPGA
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Status
Launched
-
Launch Date
2013
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Lithography
14 nm
Resources
-
Logic Elements (LE)
378000
-
Adaptive Logic Modules (ALM)
128160
-
Adaptive Logic Module (ALM) Registers
512640
-
Fabric and I/O Phase-Locked Loops (PLLs)
8
-
Maximum Embedded Memory
32 Mb
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Digital Signal Processing (DSP) Blocks
648
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Digital Signal Processing (DSP) Format
Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR, DDR2, DDR3, DDR4, HMC, MoSys, QDR II, QDR II+, RLDRAM II, RLDRAM 3
I/O Specifications
-
Maximum User I/O Count†
392
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I/O Standards Support
3.0 V to 3.3 V LVTTL, 1.2 V to 3.3V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL
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Maximum LVDS Pairs
120
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Maximum Non-Return to Zero (NRZ) Transceivers†
24
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Maximum Non-Return to Zero (NRZ) Data Rate†
28.3 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3, 100G Ethernet
Advanced Technologies
Package Specifications
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Package Options
F1152
Supplemental Information
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Additional Information
View now
Ordering and Compliance
Ordering and spec information
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I2VG
- MM# 999LHG
- Spec Code SRGP7
- Ordering Code 1SG040HH2F35I2VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I1VG
- MM# 999LJ5
- Spec Code SRGPD
- Ordering Code 1SG040HH3F35I1VG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I2LG
- MM# 999LJ6
- Spec Code SRGPE
- Ordering Code 1SG040HH3F35I2LG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I2VG
- MM# 999LJ7
- Spec Code SRGPF
- Ordering Code 1SG040HH3F35I2VG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I3VG
- MM# 999LJH
- Spec Code SRGPG
- Ordering Code 1SG040HH3F35I3VG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I3XG
- MM# 999LJJ
- Spec Code SRGPH
- Ordering Code 1SG040HH3F35I3XG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35E1VG
- MM# 999LNK
- Spec Code SRGRB
- Ordering Code 1SG040HH1F35E1VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35E2LG
- MM# 999LNL
- Spec Code SRGRC
- Ordering Code 1SG040HH1F35E2LG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35E2VG
- MM# 999LNM
- Spec Code SRGRD
- Ordering Code 1SG040HH1F35E2VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I1VG
- MM# 999LNN
- Spec Code SRGRE
- Ordering Code 1SG040HH1F35I1VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I2LG
- MM# 999LNP
- Spec Code SRGRF
- Ordering Code 1SG040HH1F35I2LG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I2VG
- MM# 999LNR
- Spec Code SRGRG
- Ordering Code 1SG040HH1F35I2VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35E1VG
- MM# 999LNT
- Spec Code SRGRH
- Ordering Code 1SG040HH2F35E1VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35E2LG
- MM# 999LNV
- Spec Code SRGRJ
- Ordering Code 1SG040HH2F35E2LG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35E2VG
- MM# 999LNW
- Spec Code SRGRK
- Ordering Code 1SG040HH2F35E2VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I1VG
- MM# 999LNX
- Spec Code SRGRL
- Ordering Code 1SG040HH2F35I1VG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I2LG
- MM# 999LNZ
- Spec Code SRGRM
- Ordering Code 1SG040HH2F35I2LG
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35E1VG
- MM# 999LP0
- Spec Code SRGRN
- Ordering Code 1SG040HH3F35E1VG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35E2LG
- MM# 999LP1
- Spec Code SRGRP
- Ordering Code 1SG040HH3F35E2LG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35E2VG
- MM# 999LP2
- Spec Code SRGRQ
- Ordering Code 1SG040HH3F35E2VG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35E3VG
- MM# 999LP3
- Spec Code SRGRR
- Ordering Code 1SG040HH3F35E3VG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35E3XG
- MM# 999LP4
- Spec Code SRGRS
- Ordering Code 1SG040HH3F35E3XG
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I2LGAS
- MM# 999VGG
- Spec Code SRH5N
- Ordering Code 1SG040HH1F35I2LGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I1VGAS
- MM# 999VGH
- Spec Code SRH5P
- Ordering Code 1SG040HH2F35I1VGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I2LGAS
- MM# 999VGJ
- Spec Code SRH5Q
- Ordering Code 1SG040HH2F35I2LGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I2VGAS
- MM# 999VGK
- Spec Code SRH5R
- Ordering Code 1SG040HH2F35I2VGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I3VGAS
- MM# 999VGL
- Spec Code SRH5S
- Ordering Code 1SG040HH3F35I3VGAS
- Stepping A0
- ECCN 3A991
- CCATS NA
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35E2LGAS
- MM# 999VGW
- Spec Code SRH5Z
- Ordering Code 1SG040HH2F35E2LGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35E1VGAS
- MM# 999VGZ
- Spec Code SRH60
- Ordering Code 1SG040HH1F35E1VGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I2VGAS
- MM# 999VH2
- Spec Code SRH61
- Ordering Code 1SG040HH1F35I2VGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I1VGAS
- MM# 999VH5
- Spec Code SRH63
- Ordering Code 1SG040HH1F35I1VGAS
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35E2LGBK
- MM# 99A738
- Spec Code SRK84
- Ordering Code 1SG040HH2F35E2LGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35E1VGBK
- MM# 99A73D
- Spec Code SRK85
- Ordering Code 1SG040HH1F35E1VGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I2VGBK
- MM# 99A73F
- Spec Code SRK86
- Ordering Code 1SG040HH1F35I2VGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I1VGBK
- MM# 99A73H
- Spec Code SRK88
- Ordering Code 1SG040HH1F35I1VGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH1F35I2LGBK
- MM# 99A73J
- Spec Code SRK89
- Ordering Code 1SG040HH1F35I2LGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I1VGBK
- MM# 99A73K
- Spec Code SRK8A
- Ordering Code 1SG040HH2F35I1VGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I2LGBK
- MM# 99A73L
- Spec Code SRK8B
- Ordering Code 1SG040HH2F35I2LGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH2F35I2VGBK
- MM# 99A73M
- Spec Code SRK8C
- Ordering Code 1SG040HH2F35I2VGBK
- Stepping A0
- ECCN 3A001.A.7.B
- CCATS G171972
Intel® Stratix® 10 GX 400 FPGA 1SG040HH3F35I3VGBK
- MM# 99A73N
- Spec Code SRK8D
- Ordering Code 1SG040HH3F35I3VGBK
- Stepping A0
- ECCN 3A991
- CCATS NA
Trade compliance information
- ECCN Varies By Product
- CCATS Varies By Product
- US HTS 8542390001
PCN/MDDS Information
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Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
Hyper-Registers
Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
Give Feedback
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for informational purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.