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  • Brand Name: Core i7

  • Product Number: i7-12700KF

  • Ordering Code: CM8071504553829

  • SPEC Code: SRL4P

  • Code Name: Alder Lake

Intel® Stratix® 10 TX 850 FPGA

Specifications

Export specifications

Essentials

Resources

I/O Specifications

Advanced Technologies

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43E1VG

  • MM# 999FHG
  • Spec Code SRFGS
  • Ordering Code 1ST085EN1F43E1VG
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43E2LG

  • MM# 999FHH
  • Spec Code SRFGT
  • Ordering Code 1ST085EN1F43E2LG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43E2VG

  • MM# 999FHJ
  • Spec Code SRFGU
  • Ordering Code 1ST085EN1F43E2VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43I1VG

  • MM# 999FHK
  • Spec Code SRFGV
  • Ordering Code 1ST085EN1F43I1VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43I2LG

  • MM# 999FHL
  • Spec Code SRFGW
  • Ordering Code 1ST085EN1F43I2LG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43I2VG

  • MM# 999FHM
  • Spec Code SRFGX
  • Ordering Code 1ST085EN1F43I2VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43I3XG

  • MM# 999FHN
  • Spec Code SRFGY
  • Ordering Code 1ST085EN3F43I3XG
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43E2LG

  • MM# 999FHP
  • Spec Code SRFGZ
  • Ordering Code 1ST085EN2F43E2LG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43E2VG

  • MM# 999FHR
  • Spec Code SRFH0
  • Ordering Code 1ST085EN2F43E2VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I1VG

  • MM# 999FHT
  • Spec Code SRFH1
  • Ordering Code 1ST085EN2F43I1VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I2LG

  • MM# 999FHV
  • Spec Code SRFH2
  • Ordering Code 1ST085EN2F43I2LG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I2VG

  • MM# 999FHW
  • Spec Code SRFH3
  • Ordering Code 1ST085EN2F43I2VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43E3VG

  • MM# 999FHX
  • Spec Code SRFH4
  • Ordering Code 1ST085EN3F43E3VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43E3XG

  • MM# 999FHZ
  • Spec Code SRFH5
  • Ordering Code 1ST085EN3F43E3XG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43I3VG

  • MM# 999FJ0
  • Spec Code SRFH6
  • Ordering Code 1ST085EN3F43I3VG
  • Stepping A0
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43E1VG

  • MM# 999FJ2
  • Spec Code SRFH7
  • Ordering Code 1ST085EN2F43E1VG
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50E1VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50E2LG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50E2VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50I1VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50I2LG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50I2VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50E1VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50E2LG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50E2VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I1VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I2LG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I2VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES3F50E3VG

Intel® Stratix® 10 TX 850 FPGA 1ST085ES3F50E3XG

  • MM# 999FK1
  • Spec Code SRFHN
  • Ordering Code 1ST085ES3F50E3XG
  • Stepping A1
  • MDDS Content IDs 799287

Intel® Stratix® 10 TX 850 FPGA 1ST085ES3F50I3VG

  • MM# 999FK2
  • Spec Code SRFHP
  • Ordering Code 1ST085ES3F50I3VG
  • Stepping A1
  • MDDS Content IDs 800035

Intel® Stratix® 10 TX 850 FPGA 1ST085ES3F50I3XG

  • MM# 999FK3
  • Spec Code SRFHQ
  • Ordering Code 1ST085ES3F50I3XG
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43E3VGAS

  • MM# 999N3T
  • Spec Code SRGVL
  • Ordering Code 1ST085EN3F43E3VGAS
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43I1VGAS

  • MM# 999N42
  • Spec Code SRGVT
  • Ordering Code 1ST085EN1F43I1VGAS
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I2LGAS

  • MM# 999N43
  • Spec Code SRGVU
  • Ordering Code 1ST085EN2F43I2LGAS
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I2VGAS

  • MM# 999N44
  • Spec Code SRGVV
  • Ordering Code 1ST085EN2F43I2VGAS
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43I3VGAS

  • MM# 999N45
  • Spec Code SRGVW
  • Ordering Code 1ST085EN3F43I3VGAS
  • Stepping A1
  • MDDS Content IDs 708811

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50I1VGAS

  • MM# 999PJP
  • Spec Code SRGYZ
  • Ordering Code 1ST085ES1F50I1VGAS
  • Stepping A1
  • MDDS Content IDs 800035

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I2LGAS

  • MM# 999PJR
  • Spec Code SRGZ0
  • Ordering Code 1ST085ES2F50I2LGAS
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I2VGAS

  • MM# 999PJT
  • Spec Code SRGZ1
  • Ordering Code 1ST085ES2F50I2VGAS
  • Stepping A1
  • MDDS Content IDs 800035

Intel® Stratix® 10 TX 850 FPGA 1ST085ES3F50I3VGAS

  • MM# 999PJV
  • Spec Code SRGZ2
  • Ordering Code 1ST085ES3F50I3VGAS
  • Stepping A1
  • MDDS Content IDs 800035

Intel® Stratix® 10 TX 850 FPGA 1ST085EN1F43I1VGBK

  • MM# 99A7NK
  • Spec Code SRKCF
  • Ordering Code 1ST085EN1F43I1VGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I2LGBK

  • MM# 99A7NL
  • Spec Code SRKCG
  • Ordering Code 1ST085EN2F43I2LGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085EN2F43I2VGBK

  • MM# 99A7NM
  • Spec Code SRKCH
  • Ordering Code 1ST085EN2F43I2VGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085EN3F43I3VGBK

  • MM# 99A7NN
  • Spec Code SRKCJ
  • Ordering Code 1ST085EN3F43I3VGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085ES1F50I1VGBK

  • MM# 99A7R8
  • Spec Code SRKCT
  • Ordering Code 1ST085ES1F50I1VGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I2LGBK

  • MM# 99A7RN
  • Spec Code SRKCU
  • Ordering Code 1ST085ES2F50I2LGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085ES2F50I2VGBK

  • MM# 99A7T3
  • Spec Code SRKCV
  • Ordering Code 1ST085ES2F50I2VGBK
  • Stepping A1

Intel® Stratix® 10 TX 850 FPGA 1ST085ES3F50I3VGBK

  • MM# 99A7TA
  • Spec Code SRKCW
  • Ordering Code 1ST085ES3F50I3VGBK
  • Stepping A1

Trade compliance information

  • ECCN 5A002U
  • CCATS G178951
  • US HTS 8542390001

PCN Information

SRKCT

SRKCU

SRKCV

SRKCG

SRKCH

SRKCJ

SRKCF

SRFHQ

SRFHH

SRGVU

SRFHG

SRGVT

SRFHF

SRFHE

SRFHD

SRFHC

SRFHB

SRFHA

SRFHP

SRFHN

SRFHM

SRFHL

SRFHK

SRFHJ

SRGVW

SRGVV

SRFGW

SRFGV

SRFH7

SRFGU

SRFH6

SRFGT

SRFH5

SRFGS

SRFH4

SRFH3

SRFH2

SRFH1

SRGVL

SRFGZ

SRFGY

SRFGX

SRFH9

SRGZ2

SRFH0

SRGYZ

SRGZ1

SRGZ0

SRKCW

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Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Processor System (HPS)

The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count†

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers†

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate†

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Maximum Pulse-Amplitude Modulation (PAM4) Transceivers†

The maximum number of PAM4 transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Pulse-Amplitude Modulation (PAM4) Data Rate†

The maximum PAM4 data rate that is supported by the PAM4 transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Hyper-Registers

Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.

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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.

Refer to Datasheet for formal definitions of product properties and features.

‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.

“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.