Intel® MAX® 10 10M50 FPGA

Specifications

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel® MAX® 10 10M50 FPGA 10M50DAF256I6G

  • MM# 965270
  • Spec Code SR4DS
  • Ordering Code 10M50DAF256I6G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DAF484C7G

  • MM# 965271
  • Spec Code SR4DT
  • Ordering Code 10M50DAF484C7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DAF672C7G

  • MM# 965272
  • Spec Code SR4DU
  • Ordering Code 10M50DAF672C7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF484I6G

  • MM# 965273
  • Spec Code SR4DV
  • Ordering Code 10M50DCF484I6G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50SCE144A7G

  • MM# 965274
  • Spec Code SR4DW
  • Ordering Code 10M50SCE144A7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DCF256C8G

  • MM# 965603
  • Spec Code SR4P8
  • Ordering Code 10M50DCF256C8G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DCF484I7G

  • MM# 965604
  • Spec Code SR4P9
  • Ordering Code 10M50DCF484I7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF672I7G

  • MM# 965605
  • Spec Code SR4PA
  • Ordering Code 10M50DCF672I7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DAF484C8G

  • MM# 965619
  • Spec Code SR4PP
  • Ordering Code 10M50DAF484C8G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF672C7G

  • MM# 965620
  • Spec Code SR4PQ
  • Ordering Code 10M50DCF672C7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DAF672I6G

  • MM# 967146
  • Spec Code SR5ZG
  • Ordering Code 10M50DAF672I6G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF256A7G

  • MM# 967147
  • Spec Code SR5ZH
  • Ordering Code 10M50DCF256A7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DCF484C8G

  • MM# 967148
  • Spec Code SR5ZJ
  • Ordering Code 10M50DCF484C8G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DAF256C8G

  • MM# 967771
  • Spec Code SR6HL
  • Ordering Code 10M50DAF256C8G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DAF256I7G

  • MM# 967772
  • Spec Code SR6HM
  • Ordering Code 10M50DAF256I7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DAF484I7P

  • MM# 967773
  • Spec Code SR6HN
  • Ordering Code 10M50DAF484I7P
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DAF672I7G

  • MM# 967774
  • Spec Code SR6HP
  • Ordering Code 10M50DAF672I7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF672C8G

  • MM# 967775
  • Spec Code SR6HQ
  • Ordering Code 10M50DCF672C8G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50SAE144I7G

  • MM# 967776
  • Spec Code SR6HR
  • Ordering Code 10M50SAE144I7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DAF484I6G

  • MM# 968828
  • Spec Code SR7DS
  • Ordering Code 10M50DAF484I6G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DAF484I7G

  • MM# 968829
  • Spec Code SR7DT
  • Ordering Code 10M50DAF484I7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF256I6G

  • MM# 968830
  • Spec Code SR7DU
  • Ordering Code 10M50DCF256I6G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DCF256I7G

  • MM# 968831
  • Spec Code SR7DV
  • Ordering Code 10M50DCF256I7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50SCE144C8G

  • MM# 968832
  • Spec Code SR7DW
  • Ordering Code 10M50SCE144C8G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DAF256C7G

  • MM# 973682
  • Spec Code SRBKJ
  • Ordering Code 10M50DAF256C7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DAF672C8G

  • MM# 973683
  • Spec Code SRBKK
  • Ordering Code 10M50DAF672C8G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50DCF256C7G

  • MM# 973685
  • Spec Code SRBKL
  • Ordering Code 10M50DCF256C7G
  • Stepping A1
  • ECCN EAR99

Intel® MAX® 10 10M50 FPGA 10M50DCF484C7G

  • MM# 973686
  • Spec Code SRBKM
  • Ordering Code 10M50DCF484C7G
  • Stepping A1
  • ECCN 3A991

Intel® MAX® 10 10M50 FPGA 10M50SAE144C8G

  • MM# 973687
  • Spec Code SRBKN
  • Ordering Code 10M50SAE144C8G
  • Stepping A1
  • ECCN EAR99

Trade compliance information

  • ECCN Varies By Product
  • CCATS NA
  • US HTS 8542390001

PCN/MDDS Information

SR4PQ

SR4PP

SR6HP

SR6HN

SR6HM

SR6HL

SR4PA

SR5ZJ

SRBKN

SRBKM

SR5ZH

SRBKL

SR5ZG

SRBKK

SRBKJ

SR4P9

SR4P8

SR4DV

SR7DS

SR4DU

SR4DT

SR4DS

SR6HR

SR6HQ

SR7DW

SR7DV

SR7DU

SR4DW

SR7DT

Drivers and Software

Latest Drivers & Software

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Name

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

User-Flashable Memory

User-flashable memory is a non-volatile memory resource available in some Intel FPGA device families.

Internal Configuration Storage

Intel FPGAs store configuration data either in internal configuration storage, or in external memory devices.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.