Intel® Agilex™ F-Series 027 FPGA

R25A

Specifications

Resources

I/O Specifications

Advanced Technologies

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A2E2V

  • MM# 99A8ZW
  • Spec Code SRKG4
  • Ordering Code AGFA027R25A2E2V
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A2E3V

  • MM# 99A8ZX
  • Spec Code SRKG5
  • Ordering Code AGFA027R25A2E3V
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A3E3E

  • MM# 99A8ZZ
  • Spec Code SRKG6
  • Ordering Code AGFA027R25A3E3E
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2E2V

  • MM# 99A900
  • Spec Code SRKG7
  • Ordering Code AGFB027R25A2E2V
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2E3V

  • MM# 99A901
  • Spec Code SRKG8
  • Ordering Code AGFB027R25A2E3V
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A3E3E

  • MM# 99A902
  • Spec Code SRKG9
  • Ordering Code AGFB027R25A3E3E
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A1E1V

  • MM# 99A903
  • Spec Code SRKGA
  • Ordering Code AGFA027R25A1E1V
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A1I1V

  • MM# 99A904
  • Spec Code SRKGB
  • Ordering Code AGFA027R25A1I1V
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A1E1V

  • MM# 99A905
  • Spec Code SRKGC
  • Ordering Code AGFB027R25A1E1V
  • Stepping A0
  • ECCN 5A002U
  • CCATS G157815L1

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A1I1V

  • MM# 99A906
  • Spec Code SRKGD
  • Ordering Code AGFB027R25A1I1V
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A3I3E

  • MM# 99A907
  • Spec Code SRKGE
  • Ordering Code AGFB027R25A3I3E
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A2I2V

  • MM# 99A908
  • Spec Code SRKGF
  • Ordering Code AGFA027R25A2I2V
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A2I3V

  • MM# 99A909
  • Spec Code SRKGG
  • Ordering Code AGFA027R25A2I3V
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A3I3E

  • MM# 99A90A
  • Spec Code SRKGH
  • Ordering Code AGFA027R25A3I3E
  • Stepping A0
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2I2V

  • MM# 99A90C
  • Spec Code SRKGJ
  • Ordering Code AGFB027R25A2I2V
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2I3V

  • MM# 99A90D
  • Spec Code SRKGK
  • Ordering Code AGFB027R25A2I3V
  • Stepping A0
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A2E3E

  • MM# 99AK4W
  • Spec Code SRKZP
  • Ordering Code AGFA027R25A2E3E
  • Stepping A2
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2E3E

  • MM# 99AK4X
  • Spec Code SRKZQ
  • Ordering Code AGFB027R25A2E3E
  • Stepping A2
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A3E4X

  • MM# 99ANK7
  • Spec Code SRL5B
  • Ordering Code AGFA027R25A3E4X
  • Stepping A2
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2E4X

  • MM# 99ANK9
  • Spec Code SRL5D
  • Ordering Code AGFB027R25A2E4X
  • Stepping A2
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFA027R25A2I3E

  • MM# 99ANKA
  • Spec Code SRL5E
  • Ordering Code AGFA027R25A2I3E
  • Stepping A2
  • ECCN 3A001.A.7.B
  • CCATS G171972

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A3E4X

  • MM# 99ANKC
  • Spec Code SRL5F
  • Ordering Code AGFB027R25A3E4X
  • Stepping A2
  • ECCN 5A002U
  • CCATS G178951

Intel® Agilex™ F-Series 027 FPGA (R25A) AGFB027R25A2I3E

  • MM# 99ANKK
  • Spec Code SRL5M
  • Ordering Code AGFB027R25A2I3E
  • Stepping A2
  • ECCN 5A002U
  • CCATS G178951

Trade compliance information

  • ECCN Varies By Product
  • CCATS Varies By Product
  • US HTS 8542390001

PCN/MDDS Information

SRKG4

SRKG5

SRKG6

SRKG7

SRKG8

SRKG9

SRKGK

SRKGC

SRKGD

SRKGE

SRKGF

SRKGG

SRKGH

SRKGJ

SRKZP

SRKZQ

SRKGA

SRKGB

Drivers and Software

Latest Drivers & Software

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Name

Technical Documentation

Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Processor System (HPS)

The hard processor system (HPS) is a complete hard CPU system contained within the Intel FPGA fabric.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Maximum Pulse-Amplitude Modulation (PAM4) Transceivers

The maximum number of PAM4 transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Pulse-Amplitude Modulation (PAM4) Data Rate

The maximum PAM4 data rate that is supported by the PAM4 transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Hyper-Registers

Hyper-Registers are additional register bits (flip-flops) located in the interconnect of some Intel FPGA device families, allowing for re-timing and pipelining of the interconnect to enable higher clock frequency in the FPGA fabric.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.