Intel® Arria® 10 GX 570 FPGA
Specifications
Compare Intel® Products
Essentials
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Product Collection
Intel® Arria® 10 GX FPGA
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Marketing Status
Launched
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Launch Date
2013
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Lithography
20 nm
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Resources
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Logic Elements (LE)
570000
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Adaptive Logic Modules (ALM)
217080
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Adaptive Logic Module (ALM) Registers
868320
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Fabric and I/O Phase-Locked Loops (PLLs)
32
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Maximum Embedded Memory
40 Mb
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Digital Signal Processing (DSP) Blocks
1523
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Digital Signal Processing (DSP) Format
Multiply, Multiply and Accumulate, Variable Precision, Fixed Point (hard IP), Floating Point (hard IP)
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Hard Memory Controllers
Yes
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External Memory Interfaces (EMIF)
DDR4, DDR3, QDR II, QDR II+, RLDRAM 3, QDR IV, LPDDR3, DDR3L
I/O Specifications
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Maximum User I/O Count†
696
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I/O Standards Support
3.0 V LVTTL, 1.2 V to 3.0 V LVCMOS, SSTL, POD, HSTL, HSUL, Differential SSTL, Differential POD, Differential HSTL, Differential HSUL, LVDS, Mini-LVDS, RSDS, LVPECL
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Maximum LVDS Pairs
324
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Maximum Non-Return to Zero (NRZ) Transceivers†
48
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Maximum Non-Return to Zero (NRZ) Data Rate†
17.4 Gbps
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Transceiver Protocol Hard IP
PCIe Gen3
Advanced Technologies
Package Specifications
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Package Options
F1152, F1517
Supplemental Information
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Additional Information
Product Table (Family Comparison)
Datasheet
All FPGA Documentation
Ordering and Compliance
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Ordering and spec information
Trade compliance information
- ECCN Varies By Product
- CCATS Varies By Product
- US HTS 8542390001
PCN Information
SR4BD
- 965184 PCN
SR6FF
- 967697 PCN
SR4BC
- 965183 PCN
SR6FE
- 967696 PCN
SR4BB
- 965182 PCN
SR6FD
- 967695 PCN
SR4BA
- 965181 PCN
SR6FC
- 967694 PCN
SR6FB
- 967693 PCN
SR6FA
- 967692 PCN
SR4BF
- 965186 PCN
SR4BE
- 965185 PCN
SR6FG
- 967698 PCN
SRC2Q
- 974699 PCN
SR4B9
- 965180 PCN
SR4B8
- 965179 PCN
SR4B7
- 965178 PCN
SR6F9
- 967691 PCN
SR4B6
- 965177 PCN
SR4AA
- 965147 PCN
SR4J3
- 965421 PCN
SR4J2
- 965420 PCN
SR4J1
- 965419 PCN
SR4J0
- 965418 PCN
SR4A3
- 965140 PCN
SR4HZ
- 965417 PCN
SR6E5
- 967651 PCN
SR6E4
- 967650 PCN
SR6E3
- 967649 PCN
SR6E2
- 967648 PCN
SR6E1
- 967647 PCN
SR6E0
- 967646 PCN
SR4A9
- 965146 PCN
SR4A8
- 965145 PCN
SR4A7
- 965144 PCN
SR4A6
- 965143 PCN
SR4A5
- 965142 PCN
SR4A4
- 965141 PCN
SR4LN
- 965512 PCN
SR4LM
- 965511 PCN
SRBGZ
- 973588 PCN
SR4LL
- 965510 PCN
SRBGY
- 973587 PCN
SR4LK
- 965509 PCN
SRBGX
- 973586 PCN
SR4LJ
- 965508 PCN
SRBGW
- 973585 PCN
SR4LH
- 965507 PCN
SR4LG
- 965506 PCN
SRBH5
- 973594 PCN
SR4LT
- 965517 PCN
SR4LS
- 965516 PCN
SR4LR
- 965515 PCN
SR4LQ
- 965514 PCN
SR4LP
- 965513 PCN
SR4LF
- 965505 PCN
SRBH4
- 973593 PCN
SRBH3
- 973592 PCN
SRBH2
- 973591 PCN
SRBH1
- 973590 PCN
SRBH0
- 973589 PCN
SR599
- 966289 PCN
SR598
- 966288 PCN
SR597
- 966287 PCN
SR596
- 966286 PCN
SR595
- 966285 PCN
SR594
- 966284 PCN
SR593
- 966283 PCN
SR59A
- 966290 PCN
Drivers and Software
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Latest Drivers & Software
Launch Date
The date the product was first introduced.
Lithography
Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.
Logic Elements (LE)
Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.
Adaptive Logic Modules (ALM)
The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.
Adaptive Logic Module (ALM) Registers
ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.
Fabric and I/O Phase-Locked Loops (PLLs)
Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.
Maximum Embedded Memory
The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.
Digital Signal Processing (DSP) Blocks
The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.
Digital Signal Processing (DSP) Format
Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.
Hard Memory Controllers
Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.
External Memory Interfaces (EMIF)
The external memory interface protocols supported by the Intel FPGA device.
Maximum User I/O Count†
The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
I/O Standards Support
The general purpose I/O interface standards supported by the Intel FPGA device.
Maximum LVDS Pairs
The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.
Maximum Non-Return to Zero (NRZ) Transceivers†
The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.
Maximum Non-Return to Zero (NRZ) Data Rate†
The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.
Transceiver Protocol Hard IP
Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.
FPGA Bitstream Security
Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.
Package Options
Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.
All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.
Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.
Refer to Datasheet for formal definitions of product properties and features.
‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.
“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.